forked from OSchip/llvm-project
AMDGPU: Split R600 MCInst lowering into its own class
Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D47307 llvm-svn: 333439
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@ -41,14 +41,14 @@ namespace {
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class AMDGPUMCInstLower {
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MCContext &Ctx;
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const AMDGPUSubtarget &ST;
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const TargetSubtargetInfo &ST;
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const AsmPrinter ≈
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const MCExpr *getLongBranchBlockExpr(const MachineBasicBlock &SrcBB,
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const MachineOperand &MO) const;
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public:
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AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST,
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AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
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const AsmPrinter &AP);
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
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@ -58,11 +58,22 @@ public:
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};
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class R600MCInstLower : public AMDGPUMCInstLower {
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public:
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R600MCInstLower(MCContext &ctx, const R600Subtarget &ST,
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const AsmPrinter &AP);
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/// Lower a MachineInstr to an MCInst
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void lower(const MachineInstr *MI, MCInst &OutMI) const;
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};
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} // End anonymous namespace
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#include "AMDGPUGenMCPseudoLowering.inc"
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AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st,
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AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx,
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const TargetSubtargetInfo &st,
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const AsmPrinter &ap):
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Ctx(ctx), ST(st), AP(ap) { }
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@ -153,7 +164,7 @@ bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
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void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
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unsigned Opcode = MI->getOpcode();
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const auto *TII = ST.getInstrInfo();
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const auto *TII = static_cast<const SIInstrInfo*>(ST.getInstrInfo());
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// FIXME: Should be able to handle this with emitPseudoExpansionLowering. We
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// need to select it to the subtarget specific version, and there's no way to
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@ -325,9 +336,22 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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}
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R600MCInstLower::R600MCInstLower(MCContext &Ctx, const R600Subtarget &ST,
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const AsmPrinter &AP) :
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AMDGPUMCInstLower(Ctx, ST, AP) { }
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void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
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OutMI.setOpcode(MI->getOpcode());
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for (const MachineOperand &MO : MI->explicit_operands()) {
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MCOperand MCOp;
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lowerOperand(MO, MCOp);
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OutMI.addOperand(MCOp);
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}
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}
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void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>();
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AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
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R600MCInstLower MCInstLowering(OutContext, STI, *this);
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StringRef Err;
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if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) {
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