forked from OSchip/llvm-project
Related to r181161 - Indirect branches may not be the last branch in a basic
block. Blocks that have an indirect branch terminator, even if it's not the last terminator, should still be treated as unanalyzable. <rdar://problem/14437274> Reducing a useful regression test case is proving difficult - I hope to have one soon. llvm-svn: 186461
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@ -295,6 +295,11 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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if (!isUnpredicatedTerminator(I))
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return false;
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// Check whether the second-to-last branch is indirect, return
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// 'unanalyzeable' here too.
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if (I != MBB.begin() && prior(I)->isIndirectBranch())
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return true;
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// If there is only one terminator instruction, process it.
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if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
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if (isUncondBranchOpcode(LastOpc)) {
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@ -322,6 +327,8 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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LastInst->eraseFromParent();
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LastInst = SecondLastInst;
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LastOpc = LastInst->getOpcode();
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if (I != MBB.begin() && prior(I)->isIndirectBranch())
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return true; // Indirect branches are unanalyzeable.
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if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
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// Return now the only terminator is an unconditional branch.
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TBB = LastInst->getOperand(0).getMBB();
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