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Related to r181161 - Indirect branches may not be the last branch in a basic 

block. Blocks that have an indirect branch terminator, even if it's not the
last terminator, should still be treated as unanalyzable.

<rdar://problem/14437274>

Reducing a useful regression test case is proving difficult - I hope to have
one soon.

llvm-svn: 186461
This commit is contained in:
Lang Hames 2013-07-16 22:01:40 +00:00
parent 2bc3dda186
commit 57a113eb0d
1 changed files with 7 additions and 0 deletions
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7
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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@ -295,6 +295,11 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
if (!isUnpredicatedTerminator(I)) if (!isUnpredicatedTerminator(I))
return false; return false;
// Check whether the second-to-last branch is indirect, return
// 'unanalyzeable' here too.
if (I != MBB.begin() && prior(I)->isIndirectBranch())
return true;
// If there is only one terminator instruction, process it. // If there is only one terminator instruction, process it.
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
if (isUncondBranchOpcode(LastOpc)) { if (isUncondBranchOpcode(LastOpc)) {
@ -322,6 +327,8 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
LastInst->eraseFromParent(); LastInst->eraseFromParent();
LastInst = SecondLastInst; LastInst = SecondLastInst;
LastOpc = LastInst->getOpcode(); LastOpc = LastInst->getOpcode();
if (I != MBB.begin() && prior(I)->isIndirectBranch())
return true; // Indirect branches are unanalyzeable.
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
// Return now the only terminator is an unconditional branch. // Return now the only terminator is an unconditional branch.
TBB = LastInst->getOperand(0).getMBB(); TBB = LastInst->getOperand(0).getMBB();