From 5798c6f3bb9813f9350ff1935098426cdac7e37c Mon Sep 17 00:00:00 2001 From: Matheus Almeida Date: Mon, 21 Oct 2013 12:07:26 +0000 Subject: [PATCH] [mips][msa] Direct Object Emission of SPLAT instruction. llvm-svn: 193077 --- llvm/lib/Target/Mips/MipsMSAInstrInfo.td | 28 ++++++++++++++---------- llvm/test/MC/Mips/msa/test_3r.s | 12 ++++++++++ 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td index f72aaae78306..23dd39359155 100644 --- a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td @@ -932,10 +932,10 @@ class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; -class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; -class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; -class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; -class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; +class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>; +class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>; +class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>; +class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>; class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; @@ -2285,14 +2285,18 @@ class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, MSA128DOpnd>; -class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, - MSA128BOpnd, GPR32Opnd>; -class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, - MSA128HOpnd, GPR32Opnd>; -class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, - MSA128WOpnd, GPR32Opnd>; -class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, - MSA128DOpnd, GPR32Opnd>; +class SPLAT_B_DESC : MSA_3R_INDEX_DESC_BASE<"splat.b", int_mips_splat_b, + MSA128BOpnd, MSA128BOpnd, + GPR32Opnd>; +class SPLAT_H_DESC : MSA_3R_INDEX_DESC_BASE<"splat.h", int_mips_splat_h, + MSA128HOpnd, MSA128HOpnd, + GPR32Opnd>; +class SPLAT_W_DESC : MSA_3R_INDEX_DESC_BASE<"splat.w", int_mips_splat_w, + MSA128WOpnd, MSA128WOpnd, + GPR32Opnd>; +class SPLAT_D_DESC : MSA_3R_INDEX_DESC_BASE<"splat.d", int_mips_splat_d, + MSA128DOpnd, MSA128DOpnd, + GPR32Opnd>; class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, MSA128BOpnd>; diff --git a/llvm/test/MC/Mips/msa/test_3r.s b/llvm/test/MC/Mips/msa/test_3r.s index be7e9fb43568..3047ecb7aa8d 100644 --- a/llvm/test/MC/Mips/msa/test_3r.s +++ b/llvm/test/MC/Mips/msa/test_3r.s @@ -200,6 +200,10 @@ # CHECK: sll.h $w17, $w27, $w3 # encoding: [0x78,0x23,0xdc,0x4d] # CHECK: sll.w $w16, $w7, $w6 # encoding: [0x78,0x46,0x3c,0x0d] # CHECK: sll.d $w9, $w0, $w26 # encoding: [0x78,0x7a,0x02,0x4d] +# CHECK: splat.b $w28, $w1[$1] # encoding: [0x78,0x81,0x0f,0x14] +# CHECK: splat.h $w2, $w11[$11] # encoding: [0x78,0xab,0x58,0x94] +# CHECK: splat.w $w22, $w0[$11] # encoding: [0x78,0xcb,0x05,0x94] +# CHECK: splat.d $w0, $w0[$2] # encoding: [0x78,0xe2,0x00,0x14] # CHECK: sra.b $w28, $w4, $w17 # encoding: [0x78,0x91,0x27,0x0d] # CHECK: sra.h $w13, $w9, $w3 # encoding: [0x78,0xa3,0x4b,0x4d] # CHECK: sra.w $w27, $w21, $w19 # encoding: [0x78,0xd3,0xae,0xcd] @@ -439,6 +443,10 @@ # CHECKOBJDUMP: sll.h $w17, $w27, $w3 # CHECKOBJDUMP: sll.w $w16, $w7, $w6 # CHECKOBJDUMP: sll.d $w9, $w0, $w26 +# CHECKOBJDUMP: splat.b $w28, $w1[$1] +# CHECKOBJDUMP: splat.h $w2, $w11[$11] +# CHECKOBJDUMP: splat.w $w22, $w0[$11] +# CHECKOBJDUMP: splat.d $w0, $w0[$2] # CHECKOBJDUMP: sra.b $w28, $w4, $w17 # CHECKOBJDUMP: sra.h $w13, $w9, $w3 # CHECKOBJDUMP: sra.w $w27, $w21, $w19 @@ -678,6 +686,10 @@ sll.h $w17, $w27, $w3 sll.w $w16, $w7, $w6 sll.d $w9, $w0, $w26 + splat.b $w28, $w1[$1] + splat.h $w2, $w11[$11] + splat.w $w22, $w0[$11] + splat.d $w0, $w0[$2] sra.b $w28, $w4, $w17 sra.h $w13, $w9, $w3 sra.w $w27, $w21, $w19