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[XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout 

Summary:
D80831 changed part of the prefix usage for AIX.
But there are other places getting prefix from DataLayout.
This patch intends to make prefix usage consistent on AIX.

Reviewed by: hubert.reinterpretcast, daltenty

Differential Revision: https://reviews.llvm.org/D81270
This commit is contained in:
jasonliu 2020-07-02 22:45:59 +00:00
parent fc81f48fde
commit 572dde55ee
9 changed files with 74 additions and 40 deletions
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14
clang/lib/Basic/Targets/PPC.h
View File

@ -349,7 +349,10 @@ class LLVM_LIBRARY_VISIBILITY PPC32TargetInfo : public PPCTargetInfo {
public:
PPC32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
: PPCTargetInfo(Triple, Opts) {
resetDataLayout("E-m:e-p:32:32-i64:64-n32");
if (Triple.isOSAIX())
resetDataLayout("E-m:a-p:32:32-i64:64-n32");
else
resetDataLayout("E-m:e-p:32:32-i64:64-n32");
switch (getTriple().getOS()) {
case llvm::Triple::Linux:
@ -395,7 +398,11 @@ public:
IntMaxType = SignedLong;
Int64Type = SignedLong;
if ((Triple.getArch() == llvm::Triple::ppc64le)) {
if (Triple.isOSAIX()) {
// TODO: Set appropriate ABI for AIX platform.
resetDataLayout("E-m:a-i64:64-n32:64");
SuitableAlign = 64;
} else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
resetDataLayout("e-m:e-i64:64-n32:64");
ABI = "elfv2";
} else {
@ -403,9 +410,6 @@ public:
ABI = "elfv1";
}
if (Triple.getOS() == llvm::Triple::AIX)
SuitableAlign = 64;
if (Triple.isOSFreeBSD() || Triple.getOS() == llvm::Triple::AIX ||
Triple.isMusl()) {
LongDoubleWidth = LongDoubleAlign = 64;

1
llvm/docs/LangRef.rst
View File

@ -2366,6 +2366,7 @@ as follows:
starting with ``?`` are not mangled in any way.
* ``w``: Windows COFF mangling: Similar to ``x``, except that normal C
symbols do not receive a ``_`` prefix.
* ``a``: XCOFF mangling: Private symbols get a ``L..`` prefix.
``n<size1>:<size2>:<size3>...``
This specifies a set of native integer widths for the target CPU in
bits. For example, it might contain ``n32`` for 32-bit PowerPC,

6
llvm/include/llvm/IR/DataLayout.h
View File

@ -133,7 +133,8 @@ private:
MM_MachO,
MM_WinCOFF,
MM_WinCOFFX86,
MM_Mips
MM_Mips,
MM_XCOFF
};
ManglingModeT ManglingMode;
@ -309,6 +310,7 @@ public:
case MM_ELF:
case MM_Mips:
case MM_WinCOFF:
case MM_XCOFF:
return '\0';
case MM_MachO:
case MM_WinCOFFX86:
@ -329,6 +331,8 @@ public:
case MM_MachO:
case MM_WinCOFFX86:
return "L";
case MM_XCOFF:
return "L..";
}
llvm_unreachable("invalid mangling mode");
}

5
llvm/lib/IR/DataLayout.cpp
View File

@ -153,6 +153,8 @@ const char *DataLayout::getManglingComponent(const Triple &T) {
return "-m:o";
if (T.isOSWindows() && T.isOSBinFormatCOFF())
return T.getArch() == Triple::x86 ? "-m:x" : "-m:w";
if (T.isOSBinFormatXCOFF())
return "-m:a";
return "-m:e";
}
@ -444,6 +446,9 @@ void DataLayout::parseSpecifier(StringRef Desc) {
case 'x':
ManglingMode = MM_WinCOFFX86;
break;
case 'a':
ManglingMode = MM_XCOFF;
break;
}
break;
default:

10
llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
View File

@ -47,7 +47,7 @@ entry:
; 32SMALL-ASM: .csect .rodata[RO],2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LCPI0_0:
; 32SMALL-ASM: L..CPI0_0:
; 32SMALL-ASM: .vbyte 4, 0x40b00000
; 32SMALL-ASM: .test_float:
; 32SMALL-ASM: lwz [[REG1:[0-9]+]], L..C0(2)
@ -56,7 +56,7 @@ entry:
; 32LARGE-ASM: .csect .rodata[RO],2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LCPI0_0:
; 32LARGE-ASM: L..CPI0_0:
; 32LARGE-ASM: .vbyte 4, 0x40b00000
; 32LARGE-ASM: .test_float:
; 32LARGE-ASM: addis [[REG1:[0-9]+]], L..C0@u(2)
@ -66,7 +66,7 @@ entry:
; 64SMALL-ASM: .csect .rodata[RO],2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LCPI0_0:
; 64SMALL-ASM: L..CPI0_0:
; 64SMALL-ASM: .vbyte 4, 0x40b00000
; 64SMALL-ASM: .test_float:
; 64SMALL-ASM: ld [[REG1:[0-9]+]], L..C0(2)
@ -75,7 +75,7 @@ entry:
; 64LARGE-ASM: .csect .rodata[RO],2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LCPI0_0:
; 64LARGE-ASM: L..CPI0_0:
; 64LARGE-ASM: .vbyte 4, 0x40b00000
; 64LARGE-ASM: .test_float:
; 64LARGE-ASM: addis [[REG1:[0-9]+]], L..C0@u(2)
@ -84,4 +84,4 @@ entry:
; 64LARGE-ASM: blr
; CHECK: .toc
; CHECK: .tc .LCPI0_0[TC],.LCPI0_0
; CHECK: .tc L..CPI0_0[TC],L..CPI0_0

42
llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
View File

@ -98,11 +98,11 @@
; 32SMALL-ASM: blr
; 32SMALL-ASM: .csect .rodata[RO],2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LJTI0_0:
; 32SMALL-ASM: .vbyte 4, L..BB0_2-.LJTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_3-.LJTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_4-.LJTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_5-.LJTI0_0
; 32SMALL-ASM: L..JTI0_0:
; 32SMALL-ASM: .vbyte 4, L..BB0_2-L..JTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_3-L..JTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; 32SMALL-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
; 32LARGE-ASM-LABEL: jump_table
; 32LARGE-ASM: .jump_table:
@ -125,11 +125,11 @@
; 32LARGE-ASM: blr
; 32LARGE-ASM: .csect .rodata[RO],2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LJTI0_0:
; 32LARGE-ASM: .vbyte 4, L..BB0_2-.LJTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_3-.LJTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_4-.LJTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_5-.LJTI0_0
; 32LARGE-ASM: L..JTI0_0:
; 32LARGE-ASM: .vbyte 4, L..BB0_2-L..JTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_3-L..JTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; 32LARGE-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
; 64SMALL-ASM-LABEL: jump_table
; 64SMALL-ASM: .jump_table:
@ -151,11 +151,11 @@
; 64SMALL-ASM: blr
; 64SMALL-ASM: .csect .rodata[RO],2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LJTI0_0:
; 64SMALL-ASM: .vbyte 4, L..BB0_2-.LJTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_3-.LJTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_4-.LJTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_5-.LJTI0_0
; 64SMALL-ASM: L..JTI0_0:
; 64SMALL-ASM: .vbyte 4, L..BB0_2-L..JTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_3-L..JTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; 64SMALL-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
; 64LARGE-ASM-LABEL: jump_table
; 64LARGE-ASM: .jump_table:
@ -178,11 +178,11 @@
; 64LARGE-ASM: blr
; 64LARGE-ASM: .csect .rodata[RO],2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LJTI0_0:
; 64LARGE-ASM: .vbyte 4, L..BB0_2-.LJTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_3-.LJTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_4-.LJTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_5-.LJTI0_0
; 64LARGE-ASM: L..JTI0_0:
; 64LARGE-ASM: .vbyte 4, L..BB0_2-L..JTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_3-L..JTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
; CHECK: .toc
; CHECK: .tc .LJTI0_0[TC],.LJTI0_0
; CHECK: .tc L..JTI0_0[TC],L..JTI0_0

8
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
View File

@ -25,7 +25,7 @@ entry:
;CHECK: .csect .rodata[RO],4
;CHECK-NEXT: .align 4
;CHECK-NEXT: .L__const.main.cnst32:
;CHECK-NEXT: L..__const.main.cnst32:
;CHECK32-NEXT: .vbyte 4, 1073741824
;CHECK32-NEXT: .vbyte 4, 50
;CHECK64-NEXT: .vbyte 8, 4611686018427387954
@ -38,7 +38,7 @@ entry:
;CHECK-NEXT: .space 4
;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst16:
;CHECK-NEXT: L..__const.main.cnst16:
;CHECK32-NEXT: .vbyte 4, 1073741824
;CHECK32-NEXT: .vbyte 4, 22
;CHECK64-NEXT: .vbyte 8, 4611686018427387926
@ -46,12 +46,12 @@ entry:
;CHECK-NEXT: .space 4
;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst8:
;CHECK-NEXT: L..__const.main.cnst8:
;CHECK-NEXT: .vbyte 4, 1073741832 # 0x40000008
;CHECK-NEXT: .vbyte 4, 0 # 0x0
;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst4:
;CHECK-NEXT: L..__const.main.cnst4:
;CHECK-NEXT: .vbyte 2, 16392 # 0x4008
;CHECK-NEXT: .byte 0 # 0x0
;CHECK-NEXT: .space 1

8
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
View File

@ -27,20 +27,20 @@ entry:
; CHECK: .csect .rodata.str2.2[RO],2
; CHECK-NEXT: .align 1
; CHECK-NEXT: .Lmagic16:
; CHECK-NEXT: L..magic16:
; CHECK-NEXT: .vbyte 2, 264 # 0x108
; CHECK-NEXT: .vbyte 2, 272 # 0x110
; CHECK-NEXT: .vbyte 2, 213 # 0xd5
; CHECK-NEXT: .vbyte 2, 0 # 0x0
; CHECK-NEXT: .csect .rodata.str4.4[RO],2
; CHECK-NEXT: .align 2
; CHECK-NEXT: .Lmagic32:
; CHECK-NEXT: L..magic32:
; CHECK-NEXT: .vbyte 4, 464 # 0x1d0
; CHECK-NEXT: .vbyte 4, 472 # 0x1d8
; CHECK-NEXT: .vbyte 4, 413 # 0x19d
; CHECK-NEXT: .vbyte 4, 0 # 0x0
; CHECK-NEXT: .csect .rodata.str1.1[RO],2
; CHECK-NEXT: .LstrA:
; CHECK-NEXT: L..strA:
; CHECK-NEXT: .byte 104
; CHECK-NEXT: .byte 101
; CHECK-NEXT: .byte 108
@ -55,7 +55,7 @@ entry:
; CHECK-NEXT: .byte 33
; CHECK-NEXT: .byte 10
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .L.str:
; CHECK-NEXT: L...str:
; CHECK-NEXT: .byte 97
; CHECK-NEXT: .byte 98
; CHECK-NEXT: .byte 99

20
llvm/unittests/IR/ManglerTest.cpp
View File

@ -136,4 +136,24 @@ TEST(ManglerTest, WindowsX64) {
"?vectorcall");
}
TEST(ManglerTest, XCOFF) {
LLVMContext Ctx;
DataLayout DL("m:a"); // XCOFF/AIX
Module Mod("test", Ctx);
Mod.setDataLayout(DL);
Mangler Mang;
EXPECT_EQ(mangleStr("foo", Mang, DL), "foo");
EXPECT_EQ(mangleStr("\01foo", Mang, DL), "foo");
EXPECT_EQ(mangleStr("?foo", Mang, DL), "?foo");
EXPECT_EQ(mangleFunc("foo", llvm::GlobalValue::ExternalLinkage,
llvm::CallingConv::C, Mod, Mang),
"foo");
EXPECT_EQ(mangleFunc("?foo", llvm::GlobalValue::ExternalLinkage,
llvm::CallingConv::C, Mod, Mang),
"?foo");
EXPECT_EQ(mangleFunc("foo", llvm::GlobalValue::PrivateLinkage,
llvm::CallingConv::C, Mod, Mang),
"L..foo");
}
} // end anonymous namespace