forked from OSchip/llvm-project
[ELF] Add TargetInfo::adjustGotPcExpr for `R_GOT_PC` relaxations. NFC
With this change, `TargetInfo::adjustRelaxExpr` is only related to TLS relaxations and a subsequent clean-up can delete the `data` parameter. Differential Revision: https://reviews.llvm.org/D92079
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@ -384,6 +384,8 @@ public:
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bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
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RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr expr) const override;
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RelExpr adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const override;
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void relaxGot(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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@ -1392,15 +1394,6 @@ bool PPC64::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
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RelExpr PPC64::adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr expr) const {
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if ((type == R_PPC64_GOT_PCREL34 || type == R_PPC64_PCREL_OPT) &&
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config->pcRelOptimize) {
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// It only makes sense to optimize pld since paddi means that the address
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// of the object in the GOT is required rather than the object itself.
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assert(data && "Expecting an instruction encoding here");
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if ((readPrefixedInstruction(data) & 0xfc000000) == 0xe4000000)
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return R_PPC64_RELAX_GOT_PC;
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}
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if (type != R_PPC64_GOT_TLSGD_PCREL34 && expr == R_RELAX_TLS_GD_TO_IE)
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return R_RELAX_TLS_GD_TO_IE_GOT_OFF;
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if (expr == R_RELAX_TLS_LD_TO_LE)
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@ -1408,6 +1401,18 @@ RelExpr PPC64::adjustRelaxExpr(RelType type, const uint8_t *data,
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return expr;
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}
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RelExpr PPC64::adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const {
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if ((type == R_PPC64_GOT_PCREL34 || type == R_PPC64_PCREL_OPT) &&
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config->pcRelOptimize) {
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// It only makes sense to optimize pld since paddi means that the address
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// of the object in the GOT is required rather than the object itself.
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if ((readPrefixedInstruction(loc) & 0xfc000000) == 0xe4000000)
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return R_PPC64_RELAX_GOT_PC;
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}
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return R_GOT_PC;
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}
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// Reference: 3.7.4.1 of the 64-bit ELF V2 abi supplement.
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// The general dynamic code sequence for a global `x` uses 4 instructions.
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// Instruction Relocation Symbol
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@ -40,8 +40,8 @@ public:
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void applyJumpInstrMod(uint8_t *loc, JumpModType type,
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unsigned size) const override;
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RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr expr) const override;
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RelExpr adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const override;
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void relaxGot(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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@ -728,12 +728,12 @@ void X86_64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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}
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}
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RelExpr X86_64::adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr relExpr) const {
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RelExpr X86_64::adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const {
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if (type != R_X86_64_GOTPCRELX && type != R_X86_64_REX_GOTPCRELX)
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return relExpr;
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const uint8_t op = data[-2];
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const uint8_t modRm = data[-1];
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return R_GOT_PC;
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const uint8_t op = loc[-2];
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const uint8_t modRm = loc[-1];
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// FIXME: When PIC is disabled and foo is defined locally in the
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// lower 32 bit address space, memory operand in mov can be converted into
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@ -748,11 +748,11 @@ RelExpr X86_64::adjustRelaxExpr(RelType type, const uint8_t *data,
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// We don't support test/binop instructions without a REX prefix.
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if (type == R_X86_64_GOTPCRELX)
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return relExpr;
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return R_GOT_PC;
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// Relaxation of test, adc, add, and, cmp, or, sbb, sub, xor.
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// If PIC then no relaxation is available.
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return config->isPic ? relExpr : R_RELAX_GOT_PC_NOPIC;
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return config->isPic ? R_GOT_PC : R_RELAX_GOT_PC_NOPIC;
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}
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// A subset of relaxations can only be applied for no-PIC. This method
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@ -1361,9 +1361,7 @@ static void scanReloc(InputSectionBase &sec, OffsetGetter &getOffset, RelTy *&i,
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// runtime, because the main executable is always at the beginning of a search
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// list. We can leverage that fact.
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if (!sym.isPreemptible && (!sym.isGnuIFunc() || config->zIfuncNoplt)) {
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if (expr == R_GOT_PC && !isAbsoluteValue(sym)) {
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expr = target->adjustRelaxExpr(type, relocatedAddr, expr);
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} else {
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if (expr != R_GOT_PC) {
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// The 0x8000 bit of r_addend of R_PPC_PLTREL24 is used to choose call
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// stub type. It should be ignored if optimized to R_PC.
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if (config->emachine == EM_PPC && expr == R_PPC32_PLTREL)
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@ -1375,6 +1373,8 @@ static void scanReloc(InputSectionBase &sec, OffsetGetter &getOffset, RelTy *&i,
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type == R_HEX_GD_PLT_B22_PCREL_X ||
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type == R_HEX_GD_PLT_B32_PCREL_X)))
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expr = fromPlt(expr);
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} else if (!isAbsoluteValue(sym)) {
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expr = target->adjustGotPcExpr(type, addend, relocatedAddr);
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}
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}
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@ -155,6 +155,11 @@ RelExpr TargetInfo::adjustRelaxExpr(RelType type, const uint8_t *data,
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return expr;
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}
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RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *data) const {
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return R_GOT_PC;
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}
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void TargetInfo::relaxGot(uint8_t *loc, const Relocation &rel,
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uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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@ -150,6 +150,8 @@ public:
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virtual RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr expr) const;
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virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const;
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virtual void relaxGot(uint8_t *loc, const Relocation &rel,
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uint64_t val) const;
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virtual void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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