forked from OSchip/llvm-project
parent
17ed020569
commit
56f3b70225
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@ -24,6 +24,8 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
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def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
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def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>;
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def int_xcore_geted : Intrinsic<[llvm_i32_ty],[]>;
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def int_xcore_getet : Intrinsic<[llvm_i32_ty],[]>;
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def int_xcore_setsr : Intrinsic<[],[llvm_i32_ty]>;
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def int_xcore_clrsr : Intrinsic<[],[llvm_i32_ty]>;
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@ -66,6 +68,8 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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[NoCapture<0>]>;
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def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_setev : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
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[NoCapture<0>]>;
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def int_xcore_eeu : Intrinsic<[],[llvm_anyptr_ty], [NoCapture<0>]>;
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def int_xcore_setclk : Intrinsic<[],[llvm_anyptr_ty, llvm_anyptr_ty],
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[NoCapture<0>, NoCapture<1>]>;
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@ -995,10 +995,15 @@ def FREER_1r : _F1R<(outs), (ins GRRegs:$r),
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"freer res[$r]",
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[(int_xcore_freer GRRegs:$r)]>;
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let Uses=[R11] in
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let Uses=[R11] in {
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def SETV_1r : _F1R<(outs), (ins GRRegs:$r),
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"setv res[$r], r11",
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[(int_xcore_setv GRRegs:$r, R11)]>;
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"setv res[$r], r11",
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[(int_xcore_setv GRRegs:$r, R11)]>;
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def SETEV_1r : _F1R<(outs), (ins GRRegs:$r),
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"setev res[$r], r11",
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[(int_xcore_setev GRRegs:$r, R11)]>;
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}
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def EEU_1r : _F1R<(outs), (ins GRRegs:$r),
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"eeu res[$r]",
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@ -1006,15 +1011,24 @@ def EEU_1r : _F1R<(outs), (ins GRRegs:$r),
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// Zero operand short
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// TODO freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
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// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
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// stet, getkep, getksp, setkep, getid, kret, dcall, dret,
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// dentsp, drestsp
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def CLRE_0R : _F0R<(outs), (ins), "clre", [(int_xcore_clre)]>;
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let Defs = [R11] in
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let Defs = [R11] in {
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def GETID_0R : _F0R<(outs), (ins),
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"get r11, id",
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[(set R11, (int_xcore_getid))]>;
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"get r11, id",
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[(set R11, (int_xcore_getid))]>;
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def GETED_0R : _F0R<(outs), (ins),
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"get r11, ed",
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[(set R11, (int_xcore_geted))]>;
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def GETET_0R : _F0R<(outs), (ins),
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"get r11, et",
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[(set R11, (int_xcore_getet))]>;
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}
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def SSYNC_0r : _F0R<(outs), (ins),
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"ssync",
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@ -6,6 +6,8 @@ declare i32 @llvm.xcore.crc32(i32, i32, i32)
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declare %0 @llvm.xcore.crc8(i32, i32, i32)
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declare i32 @llvm.xcore.zext(i32, i32)
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declare i32 @llvm.xcore.sext(i32, i32)
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declare i32 @llvm.xcore.geted()
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declare i32 @llvm.xcore.getet()
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define i32 @bitrev(i32 %val) {
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; CHECK: bitrev:
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@ -55,3 +57,19 @@ define i32 @sexti(i32 %a) {
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%result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
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ret i32 %result
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}
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define i32 @geted() {
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; CHECK: geted:
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; CHECK: get r11, ed
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; CHECK-NEXT: mov r0, r11
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%result = call i32 @llvm.xcore.geted()
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ret i32 %result
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}
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define i32 @getet() {
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; CHECK: getet:
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; CHECK: get r11, et
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; CHECK-NEXT: mov r0, r11
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%result = call i32 @llvm.xcore.getet()
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ret i32 %result
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}
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@ -20,6 +20,7 @@ declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
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declare void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
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declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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declare void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
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@ -175,6 +176,14 @@ define void @setv(i8 addrspace(1)* %r, i8* %p) {
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ret void
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}
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define void @setev(i8 addrspace(1)* %r, i8* %p) {
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; CHECK: setev:
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; CHECK: mov r11, r1
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; CHECK-NEXT: setev res[r0], r11
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call void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
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ret void
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}
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define void @eeu(i8 addrspace(1)* %r) {
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; CHECK: eeu:
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; CHECK: eeu res[r0]
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