forked from OSchip/llvm-project
Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register allocation. llvm-svn: 136548
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@ -664,15 +664,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
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// Use of a dead register.
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if (!regsLive.count(Reg)) {
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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// Reserved registers may be used even when 'dead', but allocatable
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// registers can't.
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// We track the liveness of unreserved, unallocatable registers while
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// the machine function is still in SSA form. That lets us check for
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// bad EFLAGS uses. After register allocation, the unallocatable
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// registers are probably quite wrong. For example, the x87 ST0-ST7
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// registers don't track liveness at all.
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if (!isReserved(Reg) &&
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(MRI->isSSA() || TRI->isInAllocatableClass(Reg)))
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// Reserved registers may be used even when 'dead'.
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if (!isReserved(Reg))
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report("Using an undefined physical register", MO, MONum);
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} else {
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BBInfo &MInfo = MBBInfoMap[MI->getParent()];
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@ -157,7 +157,7 @@ void RegScavenger::forward() {
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if (!MO.isReg())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg))
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if (!Reg || isReserved(Reg))
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continue;
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if (MO.isUse()) {
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@ -184,7 +184,7 @@ void RegScavenger::forward() {
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if (!MO.isReg())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg))
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if (!Reg || isReserved(Reg))
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continue;
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if (MO.isUse()) {
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if (MO.isUndef())
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@ -1,6 +1,6 @@
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; Test that vectors are scalarized/lowered correctly.
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; RUN: llc < %s -march=x86 -mcpu=i386 > %t
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; RUN: llc < %s -march=x86 -mcpu=yonah -verify-machineinstrs >> %t
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; RUN: llc < %s -march=x86 -mcpu=yonah >> %t
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%d8 = type <8 x double>
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%f1 = type <1 x float>
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