forked from OSchip/llvm-project
[ELF][HEXAGON] Add R_HEX_16_X relocation
This relocation has only 6-bits the remaining are in the extender. Differential Revision: https://reviews.llvm.org/D50603 llvm-svn: 340413
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@ -112,6 +112,21 @@ static uint32_t findMaskR8(uint32_t Insn) {
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return 0x00001fe0;
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}
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static uint32_t findMaskR16(uint32_t Insn) {
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if ((0xff000000 & Insn) == 0x48000000)
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return 0x061f20ff;
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if ((0xff000000 & Insn) == 0x49000000)
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return 0x061f3fe0;
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if ((0xff000000 & Insn) == 0x78000000)
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return 0x00df3fe0;
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if ((0xff000000 & Insn) == 0xb0000000)
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return 0x0fe03fe0;
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error("unrecognized instruction for R_HEX_16_X relocation: 0x" +
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utohexstr(Insn));
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return 0;
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}
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static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
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void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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@ -128,6 +143,9 @@ void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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case R_HEX_12_X:
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or32le(Loc, applyMask(0x000007e0, Val));
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break;
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case R_HEX_16_X: // This reloc only has 6 effective bits.
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or32le(Loc, applyMask(findMaskR16(read32le(Loc)), Val & 0x3f));
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break;
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case R_HEX_32:
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or32le(Loc, Val);
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break;
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@ -177,3 +177,20 @@ r1:0=combine(r2,##_start);
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r_hex_32:
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.word _start
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# CHECK: 00011000
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# R_HEX_16_X has 4 relocation mask variations
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# 0x48000000
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memw(##_start) = r0
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# CHECK: 4880c000 memw(##69632) = r0 }
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# 0x49000000
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r0 = memw(##_start)
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# CHECK: 4980c000 r0 = memw(##69632)
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# 0x78000000
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r0 = ##_start
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# CHECK: 7800c000 r0 = ##69632 }
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# 0xb0000000
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r0 = add(r1, ##_start)
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# CHECK: b001c000 r0 = add(r1,##69632) }
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