forked from OSchip/llvm-project
[InstCombine] remove unnecessary instructions from test; NFC
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@ -413,25 +413,21 @@ define i32 @masked_bit_wrong_pred(i32 %x, i32 %y) {
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; Assert that zext(or(masked_bit_test, icmp)) can be correctly transformed to
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; or(shifted_masked_bit, zext(icmp))
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define void @zext_or_masked_bit_test(i32 %a, i32 %b, i32* %p) {
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; CHECK-LABEL: @zext_or_masked_bit_test
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* %p, align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[LD]], %b
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; CHECK-NEXT: [[SHR:%.*]] = lshr i32 %a, %b
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHR]], 1
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; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[AND]], [[EXT]]
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; CHECK-NEXT: store i32 [[OR]], i32* %p, align 4
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; CHECK-NEXT: ret void
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define i32 @zext_or_masked_bit_test(i32 %a, i32 %b, i32 %x) {
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; CHECK-LABEL: @zext_or_masked_bit_test(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[A:%.*]], [[B]]
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: [[Z3:%.*]] = or i32 [[TMP2]], [[CMP2]]
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; CHECK-NEXT: ret i32 [[Z3]]
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;
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%ld = load i32, i32* %p, align 4
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%shl = shl i32 1, %b
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%and = and i32 %shl, %a
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%tobool = icmp ne i32 %and, 0
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%cmp = icmp eq i32 %ld, %b
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%cmp = icmp eq i32 %x, %b
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%or = or i1 %tobool, %cmp
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%conv = zext i1 %or to i32
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store i32 %conv, i32* %p, align 4
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ret void
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%z = zext i1 %or to i32
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ret i32 %z
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}
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