forked from OSchip/llvm-project
[MachineOutliner] AArch64: Emit CFI instructions when outlining calls
When outlining calls, the outliner needs to update CFI to ensure that, say, exception handling works. This commit adds that functionality and adds a test just for call outlining. Call outlining stuff in machine-outliner.mir should be moved into machine-outliner-calls.mir in a later commit. llvm-svn: 327917
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@ -5282,6 +5282,25 @@ void AArch64InstrInfo::insertOutlinerEpilogue(
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.addImm(-16);
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It = MBB.insert(It, STRXpre);
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const TargetSubtargetInfo &STI = MF.getSubtarget();
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const MCRegisterInfo *MRI = STI.getRegisterInfo();
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unsigned DwarfReg = MRI->getDwarfRegNum(AArch64::LR, true);
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// Add a CFI saying the stack was moved 16 B down.
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int64_t StackPosEntry =
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MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, 16));
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BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION))
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.addCFIIndex(StackPosEntry)
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.setMIFlags(MachineInstr::FrameSetup);
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// Add a CFI saying that the LR that we want to find is now 16 B higher than
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// before.
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int64_t LRPosEntry =
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MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, DwarfReg, 16));
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BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION))
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.addCFIIndex(LRPosEntry)
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.setMIFlags(MachineInstr::FrameSetup);
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// Insert a restore before the terminator for the function.
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MachineInstr *LDRXpost = BuildMI(MF, DebugLoc(), get(AArch64::LDRXpost))
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.addReg(AArch64::SP, RegState::Define)
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@ -0,0 +1,67 @@
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# RUN: llc -simplify-mir -mtriple=aarch64--- -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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define void @baz() #0 {
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ret void
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}
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define void @bar(i32 %a) #0 {
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ret void
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}
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attributes #0 = { noredzone }
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...
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---
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name: bar
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $lr, $w8
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$sp = frame-setup SUBXri $sp, 32, 0
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$fp = frame-setup ADDXri $sp, 16, 0
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bb.1:
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BL @baz, implicit-def dead $lr, implicit $sp
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$w17 = ORRWri $wzr, 1
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$w17 = ORRWri $wzr, 1
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$w0 = ORRWri $wzr, 4
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BL @baz, implicit-def dead $lr, implicit $sp
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$w17 = ORRWri $wzr, 1
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$w17 = ORRWri $wzr, 1
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$w0 = ORRWri $wzr, 3
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BL @baz, implicit-def dead $lr, implicit $sp
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$w17 = ORRWri $wzr, 1
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$w17 = ORRWri $wzr, 1
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$w0 = ORRWri $wzr, 2
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BL @baz, implicit-def dead $lr, implicit $sp
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$w17 = ORRWri $wzr, 1
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$w17 = ORRWri $wzr, 1
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$w0 = ORRWri $wzr, 1
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bb.2:
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$fp, $lr = LDPXi $sp, 2
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RET undef $lr
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...
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---
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name: baz
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $lr, $w8
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RET undef $lr
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# CHECK: name: OUTLINED_FUNCTION_0
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# CHECK-DAG: bb.0:
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# CHECK-NEXT: liveins: $lr
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# CHECK-DAG: frame-setup CFI_INSTRUCTION def_cfa_offset -16
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# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, 16
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# CHECK-NEXT: early-clobber $sp = STRXpre $lr, $sp, -16
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# CHECK-NEXT: BL @baz, implicit-def dead $lr, implicit $sp
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# CHECK-NEXT: $w17 = ORRWri $wzr, 1
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# CHECK-NEXT: $w17 = ORRWri $wzr, 1
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# CHECK-NEXT: early-clobber $sp, $lr = LDRXpost $sp, 16
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# CHECK-NEXT: RET undef $lr
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