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MachineScheduler: add some book-keeping to fix an assert. 

Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"'

Thanks to Chad for the test case.

llvm-svn: 211865
This commit is contained in:
Andrew Trick 2014-06-27 04:57:05 +00:00
parent f6ae844eea
commit 5632722cab
2 changed files with 57 additions and 1 deletions
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8
llvm/lib/CodeGen/MachineScheduler.cpp
View File

@ -1687,8 +1687,14 @@ bool SchedBoundary::checkHazard(SUnit *SU) {
for (TargetSchedModel::ProcResIter
PI = SchedModel->getWriteProcResBegin(SC),
PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) {
if (getNextResourceCycle(PI->ProcResourceIdx, PI->Cycles) > CurrCycle)
unsigned NRCycle = getNextResourceCycle(PI->ProcResourceIdx, PI->Cycles);
if (NRCycle > CurrCycle) {
MaxObservedStall = std::max(NRCycle - CurrCycle, MaxObservedStall);
DEBUG(dbgs() << " SU(" << SU->NodeNum << ") "
<< SchedModel->getResourceName(PI->ProcResourceIdx)
<< "=" << NRCycle << "c\n");
return true;
}
}
}
return false;

50
llvm/test/CodeGen/AArch64/arm64-misched-basic-A53.ll
View File

@ -122,3 +122,53 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(i8* %A, i8** %ptr) {
}
declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0i8(i8*)
; Regression Test for PR20057.
;
; Cortex-A53 machine model stalls on A53UnitFPMDS contention. Instructions that
; are otherwise ready are jammed in the pending queue.
; CHECK: ********** MI Scheduling **********
; CHECK: testResourceConflict
; CHECK: *** Final schedule for BB#0 ***
; CHECK: BRK
; CHECK: ********** INTERVALS **********
define void @testResourceConflict(float* %ptr) {
entry:
%add1 = fadd float undef, undef
%mul2 = fmul float undef, undef
%add3 = fadd float %mul2, undef
%mul4 = fmul float undef, %add3
%add5 = fadd float %mul4, undef
%sub6 = fsub float 0.000000e+00, undef
%sub7 = fsub float %add5, undef
%div8 = fdiv float 1.000000e+00, undef
%mul9 = fmul float %div8, %sub7
%mul14 = fmul float %sub6, %div8
%mul10 = fsub float -0.000000e+00, %mul14
%mul15 = fmul float undef, %div8
%mul11 = fsub float -0.000000e+00, %mul15
%mul12 = fmul float 0.000000e+00, %div8
%mul13 = fmul float %add1, %mul9
%mul21 = fmul float %add5, %mul11
%add22 = fadd float %mul13, %mul21
store float %add22, float* %ptr, align 4
%mul28 = fmul float %add1, %mul10
%mul33 = fmul float %add5, %mul12
%add34 = fadd float %mul33, %mul28
store float %add34, float* %ptr, align 4
%mul240 = fmul float undef, %mul9
%add246 = fadd float %mul240, undef
store float %add246, float* %ptr, align 4
%mul52 = fmul float undef, %mul10
%mul57 = fmul float undef, %mul12
%add58 = fadd float %mul57, %mul52
store float %add58, float* %ptr, align 4
%mul27 = fmul float 0.000000e+00, %mul9
%mul81 = fmul float undef, %mul10
%add82 = fadd float %mul27, %mul81
store float %add82, float* %ptr, align 4
call void @llvm.trap()
unreachable
}
declare void @llvm.trap()