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[SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap. 

llvm-svn: 193941
This commit is contained in:
Venkatraman Govindaraju 2013-11-03 05:59:07 +00:00
parent 84c993ba0b
commit 5615aca219
3 changed files with 32 additions and 0 deletions
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7
llvm/lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -1397,6 +1397,13 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::SETCC, MVT::i64, Expand);
setOperationAction(ISD::BR_CC, MVT::i64, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
setOperationAction(ISD::CTPOP, MVT::i64, Legal);
setOperationAction(ISD::CTTZ , MVT::i64, Expand);
setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
setOperationAction(ISD::CTLZ , MVT::i64, Expand);
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
setOperationAction(ISD::BSWAP, MVT::i64, Expand);
}
// FIXME: There are instructions available for ATOMIC_FENCE

2
llvm/lib/Target/Sparc/SparcInstr64Bit.td
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@ -169,6 +169,8 @@ def : Pat<(sub i64:$a, (i64 simm13:$b)), (SUBri $a, (as_i32imm $b))>;
def : Pat<(SPcmpicc i64:$a, (i64 simm13:$b)), (CMPri $a, (as_i32imm $b))>;
def : Pat<(ctpop i64:$src), (POPCrr $src)>;
} // Predicates = [Is64Bit]

23
llvm/test/CodeGen/SPARC/64bit.ll
View File

@ -285,3 +285,26 @@ entry:
store i64 0, i64* %0, align 8
ret i64 0
}
; CHECK-LABEL: bit_ops
; CHECK: popc
; OPT-LABEL: bit_ops
; OPT: popc
define i64 @bit_ops(i64 %arg) {
entry:
%0 = tail call i64 @llvm.ctpop.i64(i64 %arg)
%1 = tail call i64 @llvm.ctlz.i64(i64 %arg, i1 true)
%2 = tail call i64 @llvm.cttz.i64(i64 %arg, i1 true)
%3 = tail call i64 @llvm.bswap.i64(i64 %arg)
%4 = add i64 %0, %1
%5 = add i64 %2, %3
%6 = add i64 %4, %5
ret i64 %6
}
declare i64 @llvm.ctpop.i64(i64) nounwind readnone
declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
declare i64 @llvm.bswap.i64(i64) nounwind readnone