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[AMDGPU] Remove unused DisableDecoder machinery. NFC. 

This has been unused since D24738.
This commit is contained in:
Jay Foad 2020-11-09 13:51:40 +00:00
parent fec64de261
commit 55ea017759
2 changed files with 0 additions and 10 deletions
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5
llvm/lib/Target/AMDGPU/SIInstrFormats.td
View File

@ -205,11 +205,6 @@ class InstSI <dag outs, dag ins, string asm = "",
let SchedRW = [Write32Bit];
field bits<1> DisableSIDecoder = 0;
field bits<1> DisableVIDecoder = 0;
field bits<1> DisableDecoder = 0;
let isAsmParserOnly = !ne(DisableDecoder{0}, {0});
let AsmVariantName = AMDGPUAsmVariants.Default;
// Avoid changing source registers in a way that violates constant bus read limitations.

5
llvm/lib/Target/AMDGPU/SIInstrInfo.td
View File

@ -1447,7 +1447,6 @@ multiclass EXP_m<bit done> {
EXPe {
let AssemblerPredicate = isGFX6GFX7;
let DecoderNamespace = "GFX6GFX7";
let DisableDecoder = DisableSIDecoder;
}
def _vi : EXP_Helper<done>,
@ -1455,7 +1454,6 @@ multiclass EXP_m<bit done> {
EXPe_vi {
let AssemblerPredicate = isGFX8GFX9;
let DecoderNamespace = "GFX8";
let DisableDecoder = DisableVIDecoder;
}
def _gfx10 : EXP_Helper<done>,
@ -1463,7 +1461,6 @@ multiclass EXP_m<bit done> {
EXPe {
let AssemblerPredicate = isGFX10Plus;
let DecoderNamespace = "GFX10";
let DisableDecoder = DisableSIDecoder;
}
}
}
@ -2379,7 +2376,6 @@ class VINTRP_Real_si <bits <2> op, string opName, dag outs, dag ins,
VINTRPCommon <outs, ins, asm, []>,
VINTRPe <op>,
SIMCInstr<opName, encodingFamily> {
let DisableDecoder = DisableSIDecoder;
}
class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
@ -2389,7 +2385,6 @@ class VINTRP_Real_vi <bits <2> op, string opName, dag outs, dag ins,
SIMCInstr<opName, SIEncodingFamily.VI> {
let AssemblerPredicate = VIAssemblerPredicate;
let DecoderNamespace = "GFX8";
let DisableDecoder = DisableVIDecoder;
}
// FIXME-GFX10: WIP.