forked from OSchip/llvm-project
[PowerPC] Fix the VSX v2f64 return register
v2f64 values, like other 128-bit values, are returned under VSX in register vs34 (Altivec register v2). llvm-svn: 204543
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@ -36,7 +36,7 @@ def RetCC_PPC : CallingConv<[
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CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4]>>,
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// Vector types are always returned in V2.
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CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2]>>
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CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64], CCAssignToReg<[V2]>>
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]>;
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@ -70,7 +70,7 @@ def RetCC_PPC64_ELF_FIS : CallingConv<[
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CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
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CCIfType<[f32], CCAssignToReg<[F1, F2]>>,
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CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4]>>,
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CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2]>>
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CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64], CCAssignToReg<[V2]>>
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]>;
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//===----------------------------------------------------------------------===//
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@ -104,7 +104,7 @@ def CC_PPC32_SVR4_Common : CallingConv<[
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CCIfType<[f32,f64], CCAssignToStack<8, 8>>,
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// Vectors get 16-byte stack slots that are 16-byte aligned.
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CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToStack<16, 16>>
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CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64], CCAssignToStack<16, 16>>
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]>;
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// This calling convention puts vector arguments always on the stack. It is used
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@ -118,7 +118,7 @@ def CC_PPC32_SVR4_VarArg : CallingConv<[
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// put vector arguments in vector registers before putting them on the stack.
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def CC_PPC32_SVR4 : CallingConv<[
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// The first 12 Vector arguments are passed in AltiVec registers.
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CCIfType<[v16i8, v8i16, v4i32, v4f32],
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CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64],
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CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>>,
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CCDelegateTo<CC_PPC32_SVR4_Common>
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@ -37,10 +37,8 @@ entry:
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%v = fadd <2 x double> %a, %b
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ret <2 x double> %v
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; FIXME: Check that the ABI for the return value is correct here!
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; CHECK-LABEL: @test4
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; CHECK: xvadddp {{[0-9]+}}, 34, 35
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; CHECK: xvadddp 34, 34, 35
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; CHECK: blr
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}
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