Add missing logic (if BadReg(d) then UNPREDICTABLE;) for Encoding T2 of EmulateMovRdImm().

llvm-svn: 125533
2011-02-14 23:33:58 +00:00 · 2011-02-14 23:33:58 +00:00 · 557520b996
parent fe9cf0abb7
commit 557520b996
1 changed files with 2 additions and 0 deletions
--- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@ -698,6 +698,8 @@ EmulateInstructionARM::EmulateMovRdImm (ARMEncoding encoding)
            setflags = BitIsSet(opcode, 20);
            imm12 = Bit32(opcode, 26) << 11 | Bits32(opcode, 14, 12) << 8 | Bits32(opcode, 7, 0);
            imm32 = ThumbExpandImm_C(imm12, Bit32(m_inst_cpsr, CPSR_C), carry);
+            if (BadReg(Rd))
+                return false;
            break;
        default:
            return false;