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Use raw_pwrite_stream in the object writer/streamer. 

The ELF object writer will take advantage of that in the next commit.

llvm-svn: 234950
This commit is contained in:
Rafael Espindola 2015-04-14 22:14:34 +00:00
parent 931b107364
commit 5560a4cfbd
74 changed files with 192 additions and 152 deletions
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3
llvm/include/llvm/LTO/LTOCodeGenerator.h
View File

@ -53,6 +53,7 @@ namespace llvm {
class TargetLibraryInfo;
class TargetMachine;
class raw_ostream;
class raw_pwrite_stream;
//===----------------------------------------------------------------------===//
/// C++ class which implements the opaque lto_code_gen_t type.
@ -137,7 +138,7 @@ struct LTOCodeGenerator {
private:
void initializeLTOPasses();
bool compileOptimized(raw_ostream &out, std::string &errMsg);
bool compileOptimized(raw_pwrite_stream &out, std::string &errMsg);
bool compileOptimizedToFile(const char **name, std::string &errMsg);
void applyScopeRestrictions();
void applyRestriction(GlobalValue &GV, ArrayRef<StringRef> Libcalls,

2
llvm/include/llvm/MC/MCAsmBackend.h
View File

@ -48,7 +48,7 @@ public:
/// Create a new MCObjectWriter instance for use by the assembler backend to
/// emit the final object file.
virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const = 0;
virtual MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const = 0;
/// Create a new ELFObjectTargetWriter to enable non-standard
/// ELFObjectWriters.

4
llvm/include/llvm/MC/MCELFObjectWriter.h
View File

@ -24,6 +24,7 @@ class MCSectionData;
class MCSymbol;
class MCSymbolData;
class MCValue;
class raw_pwrite_stream;
struct ELFRelocationEntry {
uint64_t Offset; // Where is the relocation.
@ -130,7 +131,8 @@ public:
/// \param OS - The stream to write to.
/// \returns The constructed object writer.
MCObjectWriter *createELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &OS, bool IsLittleEndian);
raw_pwrite_stream &OS,
bool IsLittleEndian);
} // End llvm namespace
#endif

10
llvm/include/llvm/MC/MCELFStreamer.h
View File

@ -29,10 +29,9 @@ class raw_ostream;
class MCELFStreamer : public MCObjectStreamer {
public:
MCELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
MCELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter)
: MCObjectStreamer(Context, TAB, OS, Emitter),
SeenIdent(false) {}
: MCObjectStreamer(Context, TAB, OS, Emitter), SeenIdent(false) {}
~MCELFStreamer() override;
@ -116,8 +115,9 @@ private:
};
MCELFStreamer *createARMELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll, bool IsThumb);
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll,
bool IsThumb);
} // end namespace llvm

5
llvm/include/llvm/MC/MCMachObjectWriter.h
View File

@ -119,7 +119,7 @@ class MachObjectWriter : public MCObjectWriter {
MachSymbolData *findSymbolData(const MCSymbol &Sym);
public:
MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &OS,
MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_pwrite_stream &OS,
bool IsLittleEndian)
: MCObjectWriter(OS, IsLittleEndian), TargetObjectWriter(MOTW) {}
@ -279,7 +279,8 @@ public:
/// \param OS - The stream to write to.
/// \returns The constructed object writer.
MCObjectWriter *createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
raw_ostream &OS, bool IsLittleEndian);
raw_pwrite_stream &OS,
bool IsLittleEndian);
} // End llvm namespace

3
llvm/include/llvm/MC/MCObjectStreamer.h
View File

@ -24,6 +24,7 @@ class MCFragment;
class MCDataFragment;
class MCAsmBackend;
class raw_ostream;
class raw_pwrite_stream;
/// \brief Streaming object file generation interface.
///
@ -45,7 +46,7 @@ class MCObjectStreamer : public MCStreamer {
void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
protected:
MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter);
~MCObjectStreamer() override;

4
llvm/include/llvm/MC/MCObjectWriter.h
View File

@ -42,12 +42,12 @@ class MCObjectWriter {
void operator=(const MCObjectWriter &) = delete;
protected:
raw_ostream &OS;
raw_pwrite_stream &OS;
unsigned IsLittleEndian : 1;
protected: // Can only create subclasses.
MCObjectWriter(raw_ostream &OS, bool IsLittleEndian)
MCObjectWriter(raw_pwrite_stream &OS, bool IsLittleEndian)
: OS(OS), IsLittleEndian(IsLittleEndian) {}
public:

3
llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
View File

@ -16,6 +16,7 @@ class MCFixup;
class MCObjectWriter;
class MCValue;
class raw_ostream;
class raw_pwrite_stream;
class MCWinCOFFObjectTargetWriter {
virtual void anchor();
@ -40,7 +41,7 @@ class raw_ostream;
/// \param OS - The stream to write to.
/// \returns The constructed object writer.
MCObjectWriter *createWinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW,
raw_ostream &OS);
raw_pwrite_stream &OS);
} // End llvm namespace
#endif

3
llvm/include/llvm/MC/MCWinCOFFStreamer.h
View File

@ -24,11 +24,12 @@ class MCSubtargetInfo;
class MCSymbol;
class StringRef;
class raw_ostream;
class raw_pwrite_stream;
class MCWinCOFFStreamer : public MCObjectStreamer {
public:
MCWinCOFFStreamer(MCContext &Context, MCAsmBackend &MAB, MCCodeEmitter &CE,
raw_ostream &OS);
raw_pwrite_stream &OS);
/// state management
void reset() override {

14
llvm/include/llvm/Support/TargetRegistry.h
View File

@ -50,6 +50,7 @@ namespace llvm {
class TargetMachine;
class TargetOptions;
class raw_ostream;
class raw_pwrite_stream;
class formatted_raw_ostream;
MCStreamer *createNullStreamer(MCContext &Ctx);
@ -61,10 +62,10 @@ namespace llvm {
/// Takes ownership of \p TAB and \p CE.
MCStreamer *createELFStreamer(MCContext &Ctx, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *CE,
raw_pwrite_stream &OS, MCCodeEmitter *CE,
bool RelaxAll);
MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *CE,
raw_pwrite_stream &OS, MCCodeEmitter *CE,
bool RelaxAll, bool DWARFMustBeAtTheEnd,
bool LabelSections = false);
@ -135,14 +136,15 @@ namespace llvm {
const MCRegisterInfo &MRI,
MCContext &Ctx);
typedef MCStreamer *(*ELFStreamerCtorTy)(const Triple &T, MCContext &Ctx,
MCAsmBackend &TAB, raw_ostream &OS,
MCAsmBackend &TAB,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll);
typedef MCStreamer *(*MachOStreamerCtorTy)(
MCContext &Ctx, MCAsmBackend &TAB, raw_ostream &OS,
MCContext &Ctx, MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll, bool DWARFMustBeAtTheEnd);
typedef MCStreamer *(*COFFStreamerCtorTy)(MCContext &Ctx, MCAsmBackend &TAB,
raw_ostream &OS,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll);
typedef MCTargetStreamer *(*NullTargetStreamerCtorTy)(MCStreamer &S);
@ -438,7 +440,7 @@ namespace llvm {
/// \param Emitter The target independent assembler object.Takes ownership.
/// \param RelaxAll Relax all fixups?
MCStreamer *createMCObjectStreamer(const Triple &T, MCContext &Ctx,
MCAsmBackend &TAB, raw_ostream &OS,
MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
const MCSubtargetInfo &STI,
bool RelaxAll,

13
llvm/include/llvm/Target/TargetMachine.h
View File

@ -48,6 +48,7 @@ class TargetSubtargetInfo;
class TargetTransformInfo;
class formatted_raw_ostream;
class raw_ostream;
class raw_pwrite_stream;
class TargetLoweringObjectFile;
// The old pass manager infrastructure is hidden in a legacy namespace now.
@ -207,7 +208,7 @@ public:
/// emitted. Typically this will involve several steps of code generation.
/// This method should return true if emission of this file type is not
/// supported, or false on success.
virtual bool addPassesToEmitFile(PassManagerBase &, raw_ostream &,
virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
CodeGenFileType,
bool /*DisableVerify*/ = true,
AnalysisID /*StartAfter*/ = nullptr,
@ -220,9 +221,8 @@ public:
/// fills the MCContext Ctx pointer which can be used to build custom
/// MCStreamer.
///
virtual bool addPassesToEmitMC(PassManagerBase &,
MCContext *&,
raw_ostream &,
virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
raw_pwrite_stream &,
bool /*DisableVerify*/ = true) {
return true;
}
@ -256,7 +256,7 @@ public:
/// Add passes to the specified pass manager to get the specified file
/// emitted. Typically this will involve several steps of code generation.
bool addPassesToEmitFile(PassManagerBase &PM, raw_ostream &Out,
bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
CodeGenFileType FileType, bool DisableVerify = true,
AnalysisID StartAfter = nullptr,
AnalysisID StopAfter = nullptr) override;
@ -266,7 +266,8 @@ public:
/// fills the MCContext Ctx pointer which can be used to build custom
/// MCStreamer.
bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
raw_ostream &OS, bool DisableVerify = true) override;
raw_pwrite_stream &OS,
bool DisableVerify = true) override;
};
} // End llvm namespace

7
llvm/lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -141,7 +141,7 @@ static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
}
bool LLVMTargetMachine::addPassesToEmitFile(
PassManagerBase &PM, raw_ostream &Out, CodeGenFileType FileType,
PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType,
bool DisableVerify, AnalysisID StartAfter, AnalysisID StopAfter) {
// Add common CodeGen passes.
MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
@ -227,9 +227,8 @@ bool LLVMTargetMachine::addPassesToEmitFile(
/// code is not supported. It fills the MCContext Ctx pointer which can be
/// used to build custom MCStreamer.
///
bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
MCContext *&Ctx,
raw_ostream &Out,
bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
raw_pwrite_stream &Out,
bool DisableVerify) {
// Add common CodeGen passes.
Ctx = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, nullptr);

3
llvm/lib/LTO/LTOCodeGenerator.cpp
View File

@ -566,7 +566,8 @@ bool LTOCodeGenerator::optimize(bool DisableInline,
return true;
}
bool LTOCodeGenerator::compileOptimized(raw_ostream &out, std::string &errMsg) {
bool LTOCodeGenerator::compileOptimized(raw_pwrite_stream &out,
std::string &errMsg) {
if (!this->determineTarget(errMsg))
return false;

4
llvm/lib/MC/ELFObjectWriter.cpp
View File

@ -168,7 +168,7 @@ class ELFObjectWriter : public MCObjectWriter {
}
public:
ELFObjectWriter(MCELFObjectTargetWriter *MOTW, raw_ostream &OS,
ELFObjectWriter(MCELFObjectTargetWriter *MOTW, raw_pwrite_stream &OS,
bool IsLittleEndian)
: MCObjectWriter(OS, IsLittleEndian), FWriter(IsLittleEndian),
TargetObjectWriter(MOTW), NeedsGOT(false) {}
@ -1711,7 +1711,7 @@ bool ELFObjectWriter::isWeak(const MCSymbolData &SD) const {
}
MCObjectWriter *llvm::createELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &OS,
raw_pwrite_stream &OS,
bool IsLittleEndian) {
return new ELFObjectWriter(MOTW, OS, IsLittleEndian);
}

2
llvm/lib/MC/MCELFStreamer.cpp
View File

@ -647,7 +647,7 @@ void MCELFStreamer::FinishImpl() {
}
MCStreamer *llvm::createELFStreamer(MCContext &Context, MCAsmBackend &MAB,
raw_ostream &OS, MCCodeEmitter *CE,
raw_pwrite_stream &OS, MCCodeEmitter *CE,
bool RelaxAll) {
MCELFStreamer *S = new MCELFStreamer(Context, MAB, OS, CE);
if (RelaxAll)

4
llvm/lib/MC/MCMachOStreamer.cpp
View File

@ -54,7 +54,7 @@ private:
void EmitDataRegionEnd();
public:
MCMachOStreamer(MCContext &Context, MCAsmBackend &MAB, raw_ostream &OS,
MCMachOStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool DWARFMustBeAtTheEnd, bool label)
: MCObjectStreamer(Context, MAB, OS, Emitter), LabelSections(label),
DWARFMustBeAtTheEnd(DWARFMustBeAtTheEnd), CreatedADWARFSection(false) {}
@ -491,7 +491,7 @@ void MCMachOStreamer::FinishImpl() {
}
MCStreamer *llvm::createMachOStreamer(MCContext &Context, MCAsmBackend &MAB,
raw_ostream &OS, MCCodeEmitter *CE,
raw_pwrite_stream &OS, MCCodeEmitter *CE,
bool RelaxAll, bool DWARFMustBeAtTheEnd,
bool LabelSections) {
MCMachOStreamer *S = new MCMachOStreamer(Context, MAB, OS, CE,

3
llvm/lib/MC/MCObjectStreamer.cpp
View File

@ -24,7 +24,8 @@
using namespace llvm;
MCObjectStreamer::MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter_)
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter_)
: MCStreamer(Context),
Assembler(new MCAssembler(Context, TAB, *Emitter_,
*TAB.createObjectWriter(OS), OS)),

2
llvm/lib/MC/MachObjectWriter.cpp
View File

@ -1007,7 +1007,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
}
MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
raw_ostream &OS,
raw_pwrite_stream &OS,
bool IsLittleEndian) {
return new MachObjectWriter(MOTW, OS, IsLittleEndian);
}

6
llvm/lib/MC/WinCOFFObjectWriter.cpp
View File

@ -126,7 +126,7 @@ public:
bool UseBigObj;
WinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW, raw_ostream &OS);
WinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW, raw_pwrite_stream &OS);
void reset() override {
memset(&Header, 0, sizeof(Header));
@ -258,7 +258,7 @@ size_t COFFSection::size() {
// WinCOFFObjectWriter class implementation
WinCOFFObjectWriter::WinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW,
raw_ostream &OS)
raw_pwrite_stream &OS)
: MCObjectWriter(OS, true), TargetObjectWriter(MOTW) {
memset(&Header, 0, sizeof(Header));
@ -1075,6 +1075,6 @@ void MCWinCOFFObjectTargetWriter::anchor() {}
MCObjectWriter *
llvm::createWinCOFFObjectWriter(MCWinCOFFObjectTargetWriter *MOTW,
raw_ostream &OS) {
raw_pwrite_stream &OS) {
return new WinCOFFObjectWriter(MOTW, OS);
}

2
llvm/lib/MC/WinCOFFStreamer.cpp
View File

@ -39,7 +39,7 @@ using namespace llvm;
namespace llvm {
MCWinCOFFStreamer::MCWinCOFFStreamer(MCContext &Context, MCAsmBackend &MAB,
MCCodeEmitter &CE, raw_ostream &OS)
MCCodeEmitter &CE, raw_pwrite_stream &OS)
: MCObjectStreamer(Context, MAB, OS, &CE), CurSymbol(nullptr) {}
void MCWinCOFFStreamer::EmitInstToData(const MCInst &Inst,

4
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
View File

@ -313,7 +313,7 @@ public:
DarwinAArch64AsmBackend(const Target &T, const MCRegisterInfo &MRI)
: AArch64AsmBackend(T), MRI(MRI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createAArch64MachObjectWriter(OS, MachO::CPU_TYPE_ARM64,
MachO::CPU_SUBTYPE_ARM64_ALL);
}
@ -461,7 +461,7 @@ public:
ELFAArch64AsmBackend(const Target &T, uint8_t OSABI, bool IsLittleEndian)
: AArch64AsmBackend(T), OSABI(OSABI), IsLittleEndian(IsLittleEndian) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createAArch64ELFObjectWriter(OS, OSABI, IsLittleEndian);
}

2
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
View File

@ -248,7 +248,7 @@ unsigned AArch64ELFObjectWriter::GetRelocType(const MCValue &Target,
llvm_unreachable("Unimplemented fixup -> relocation");
}
MCObjectWriter *llvm::createAArch64ELFObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createAArch64ELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian) {
MCELFObjectTargetWriter *MOTW =

8
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
View File

@ -89,8 +89,8 @@ class AArch64ELFStreamer : public MCELFStreamer {
public:
friend class AArch64TargetELFStreamer;
AArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
MCCodeEmitter *Emitter)
AArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_pwrite_stream &OS, MCCodeEmitter *Emitter)
: MCELFStreamer(Context, TAB, OS, Emitter), MappingSymbolCounter(0),
LastEMS(EMS_None) {}
@ -211,8 +211,8 @@ MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,
}
MCELFStreamer *createAArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll) {
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll) {
AArch64ELFStreamer *S = new AArch64ELFStreamer(Context, TAB, OS, Emitter);
if (RelaxAll)
S->getAssembler().setRelaxAll(true);

4
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
View File

@ -19,8 +19,8 @@
namespace llvm {
MCELFStreamer *createAArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll);
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll);
}
#endif

6
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
View File

@ -123,14 +123,14 @@ static MCInstPrinter *createAArch64MCInstPrinter(const Triple &T,
}
static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
MCAsmBackend &TAB, raw_ostream &OS,
MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll) {
return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
}
static MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll,
bool DWARFMustBeAtTheEnd) {
return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
DWARFMustBeAtTheEnd,

7
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
View File

@ -33,6 +33,7 @@ class StringRef;
class Target;
class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheAArch64leTarget;
extern Target TheAArch64beTarget;
@ -48,10 +49,12 @@ MCAsmBackend *createAArch64beAsmBackend(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
MCObjectWriter *createAArch64ELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian);
MCObjectWriter *createAArch64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
MCObjectWriter *createAArch64MachObjectWriter(raw_pwrite_stream &OS,
uint32_t CPUType,
uint32_t CPUSubtype);
MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,

2
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
View File

@ -413,7 +413,7 @@ void AArch64MachObjectWriter::RecordRelocation(
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createAArch64MachObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createAArch64MachObjectWriter(raw_pwrite_stream &OS,
uint32_t CPUType,
uint32_t CPUSubtype) {
return createMachObjectWriter(

2
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
View File

@ -23,7 +23,7 @@ public:
HasDataInCodeSupport = true;
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMMachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPU_TYPE_ARM,
Subtype);
}

2
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h
View File

@ -18,7 +18,7 @@ public:
ARMAsmBackendELF(const Target &T, StringRef TT, uint8_t OSABI, bool IsLittle)
: ARMAsmBackend(T, TT, IsLittle), OSABI(OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMELFObjectWriter(OS, OSABI, isLittle());
}
};

2
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h
View File

@ -17,7 +17,7 @@ class ARMAsmBackendWinCOFF : public ARMAsmBackend {
public:
ARMAsmBackendWinCOFF(const Target &T, StringRef Triple)
: ARMAsmBackend(T, Triple, true) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMWinCOFFObjectWriter(OS, /*Is64Bit=*/false);
}
};

2
llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
View File

@ -251,7 +251,7 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
return Type;
}
MCObjectWriter *llvm::createARMELFObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createARMELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian) {
MCELFObjectTargetWriter *MOTW = new ARMELFObjectWriter(OSABI);

7
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -472,7 +472,7 @@ class ARMELFStreamer : public MCELFStreamer {
public:
friend class ARMTargetELFStreamer;
ARMELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
ARMELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool IsThumb)
: MCELFStreamer(Context, TAB, OS, Emitter), IsThumb(IsThumb),
MappingSymbolCounter(0), LastEMS(EMS_None) {
@ -1382,8 +1382,9 @@ MCTargetStreamer *createARMObjectTargetStreamer(MCStreamer &S,
}
MCELFStreamer *createARMELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll, bool IsThumb) {
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll,
bool IsThumb) {
ARMELFStreamer *S = new ARMELFStreamer(Context, TAB, OS, Emitter, IsThumb);
// FIXME: This should eventually end up somewhere else where more
// intelligent flag decisions can be made. For now we are just maintaining

4
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
View File

@ -310,14 +310,14 @@ static MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
}
static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
MCAsmBackend &MAB, raw_ostream &OS,
MCAsmBackend &MAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll) {
return createARMELFStreamer(Ctx, MAB, OS, Emitter, false,
T.getArch() == Triple::thumb);
}
static MCStreamer *createARMMachOStreamer(MCContext &Ctx, MCAsmBackend &MAB,
raw_ostream &OS,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll,
bool DWARFMustBeAtTheEnd) {
return createMachOStreamer(Ctx, MAB, OS, Emitter, false, DWARFMustBeAtTheEnd);

12
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
View File

@ -34,6 +34,7 @@ class StringRef;
class Target;
class Triple;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheARMLETarget, TheThumbLETarget;
extern Target TheARMBETarget, TheThumbBETarget;
@ -82,20 +83,21 @@ MCAsmBackend *createThumbBEAsmBackend(const Target &T, const MCRegisterInfo &MRI
// Construct a PE/COFF machine code streamer which will generate a PE/COFF
// object file.
MCStreamer *createARMWinCOFFStreamer(MCContext &Context, MCAsmBackend &MAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll);
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll);
/// Construct an ELF Mach-O object writer.
MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
MCObjectWriter *createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian);
/// Construct an ARM Mach-O object writer.
MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS, bool Is64Bit,
MCObjectWriter *createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);
/// Construct an ARM PE/COFF object writer.
MCObjectWriter *createARMWinCOFFObjectWriter(raw_ostream &OS, bool Is64Bit);
MCObjectWriter *createARMWinCOFFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit);
/// Construct ARM Mach-O relocation info.
MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx);

4
llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
View File

@ -472,8 +472,8 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createARMMachObjectWriter(raw_ostream &OS, bool Is64Bit,
uint32_t CPUType,
MCObjectWriter *llvm::createARMMachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return createMachObjectWriter(new ARMMachObjectWriter(Is64Bit,
CPUType,

3
llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
View File

@ -82,7 +82,8 @@ bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
}
namespace llvm {
MCObjectWriter *createARMWinCOFFObjectWriter(raw_ostream &OS, bool Is64Bit) {
MCObjectWriter *createARMWinCOFFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit) {
MCWinCOFFObjectTargetWriter *MOTW = new ARMWinCOFFObjectWriter(Is64Bit);
return createWinCOFFObjectWriter(MOTW, OS);
}

7
llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp
View File

@ -16,8 +16,8 @@ namespace {
class ARMWinCOFFStreamer : public MCWinCOFFStreamer {
public:
ARMWinCOFFStreamer(MCContext &C, MCAsmBackend &AB, MCCodeEmitter &CE,
raw_ostream &OS)
: MCWinCOFFStreamer(C, AB, CE, OS) { }
raw_pwrite_stream &OS)
: MCWinCOFFStreamer(C, AB, CE, OS) {}
void EmitAssemblerFlag(MCAssemblerFlag Flag) override;
void EmitThumbFunc(MCSymbol *Symbol) override;
@ -38,7 +38,8 @@ void ARMWinCOFFStreamer::EmitThumbFunc(MCSymbol *Symbol) {
}
MCStreamer *llvm::createARMWinCOFFStreamer(MCContext &Context,
MCAsmBackend &MAB, raw_ostream &OS,
MCAsmBackend &MAB,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll) {
return new ARMWinCOFFStreamer(Context, MAB, *Emitter, OS);

8
llvm/lib/Target/CppBackend/CPPBackend.cpp
View File

@ -2149,11 +2149,9 @@ char CppWriter::ID = 0;
// External Interface declaration
//===----------------------------------------------------------------------===//
bool CPPTargetMachine::addPassesToEmitFile(PassManagerBase &PM, raw_ostream &o,
CodeGenFileType FileType,
bool DisableVerify,
AnalysisID StartAfter,
AnalysisID StopAfter) {
bool CPPTargetMachine::addPassesToEmitFile(
PassManagerBase &PM, raw_pwrite_stream &o, CodeGenFileType FileType,
bool DisableVerify, AnalysisID StartAfter, AnalysisID StopAfter) {
if (FileType != TargetMachine::CGFT_AssemblyFile)
return true;
auto FOut = llvm::make_unique<formatted_raw_ostream>(o);

2
llvm/lib/Target/CppBackend/CPPTargetMachine.h
View File

@ -29,7 +29,7 @@ struct CPPTargetMachine : public TargetMachine {
: TargetMachine(T, "", TT, CPU, FS, Options) {}
public:
bool addPassesToEmitFile(PassManagerBase &PM, raw_ostream &Out,
bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
CodeGenFileType FileType, bool DisableVerify,
AnalysisID StartAfter,
AnalysisID StopAfter) override;

2
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
View File

@ -57,7 +57,7 @@ public:
ELFHexagonAsmBackend(Target const &T, uint8_t OSABI)
: HexagonAsmBackend(T), OSABI(OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
StringRef CPU("HexagonV4");
return createHexagonELFObjectWriter(OS, OSABI, CPU);
}

2
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
View File

@ -55,7 +55,7 @@ unsigned HexagonELFObjectWriter::GetRelocType(MCValue const &/*Target*/,
return Type;
}
MCObjectWriter *llvm::createHexagonELFObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createHexagonELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
StringRef CPU) {
MCELFObjectTargetWriter *MOTW = new HexagonELFObjectWriter(OSABI, CPU);

5
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
View File

@ -27,6 +27,7 @@ class MCSubtargetInfo;
class Target;
class StringRef;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheHexagonTarget;
@ -40,8 +41,8 @@ MCAsmBackend *createHexagonAsmBackend(Target const &T,
MCRegisterInfo const &MRI, StringRef TT,
StringRef CPU);
MCObjectWriter *createHexagonELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
StringRef CPU);
MCObjectWriter *createHexagonELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI, StringRef CPU);
} // End llvm namespace

3
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
View File

@ -155,7 +155,8 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
return Value;
}
MCObjectWriter *MipsAsmBackend::createObjectWriter(raw_ostream &OS) const {
MCObjectWriter *
MipsAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createMipsELFObjectWriter(OS,
MCELFObjectTargetWriter::getOSABI(OSType), IsLittle, Is64Bit);
}

2
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
View File

@ -36,7 +36,7 @@ public:
bool Is64Bit)
: MCAsmBackend(), OSType(OSType), IsLittle(IsLittle), Is64Bit(Is64Bit) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override;
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override;
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value, bool IsPCRel) const override;

3
llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -444,7 +444,8 @@ MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbolData &SD,
}
}
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian,
bool Is64Bit) {
MCELFObjectTargetWriter *MOTW =

3
llvm/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
View File

@ -70,7 +70,8 @@ void MipsELFStreamer::EmitMipsOptionRecords() {
}
MCELFStreamer *llvm::createMipsELFStreamer(MCContext &Context,
MCAsmBackend &MAB, raw_ostream &OS,
MCAsmBackend &MAB,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll) {
return new MipsELFStreamer(Context, MAB, OS, Emitter);

6
llvm/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h
View File

@ -33,7 +33,7 @@ class MipsELFStreamer : public MCELFStreamer {
public:
MipsELFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_ostream &OS,
MipsELFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter)
: MCELFStreamer(Context, MAB, OS, Emitter) {
@ -68,7 +68,7 @@ public:
};
MCELFStreamer *createMipsELFStreamer(MCContext &Context, MCAsmBackend &MAB,
raw_ostream &OS, MCCodeEmitter *Emitter,
bool RelaxAll);
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll);
} // namespace llvm.
#endif

5
llvm/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h
View File

@ -23,9 +23,8 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg);
// This function creates an MCELFStreamer for Mips NaCl.
MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll);
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll);
}
#endif

2
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -106,7 +106,7 @@ static MCInstPrinter *createMipsMCInstPrinter(const Triple &T,
}
static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
MCAsmBackend &MAB, raw_ostream &OS,
MCAsmBackend &MAB, raw_pwrite_stream &OS,
MCCodeEmitter *Emitter, bool RelaxAll) {
MCStreamer *S;
if (!T.isOSNaCl())

3
llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -27,6 +27,7 @@ class MCSubtargetInfo;
class StringRef;
class Target;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheMipsTarget;
extern Target TheMipselTarget;
@ -53,7 +54,7 @@ MCAsmBackend *createMipsAsmBackendEL64(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
MCObjectWriter *createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian, bool Is64Bit);
namespace MIPS_MC {

6
llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
View File

@ -36,8 +36,8 @@ const unsigned LoadStoreStackMaskReg = Mips::T7;
class MipsNaClELFStreamer : public MipsELFStreamer {
public:
MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS,
MCCodeEmitter *Emitter)
MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_pwrite_stream &OS, MCCodeEmitter *Emitter)
: MipsELFStreamer(Context, TAB, OS, Emitter), PendingCall(false) {}
~MipsNaClELFStreamer() override {}
@ -252,7 +252,7 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg) {
}
MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
raw_ostream &OS,
raw_pwrite_stream &OS,
MCCodeEmitter *Emitter,
bool RelaxAll) {
MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter);

2
llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
View File

@ -52,7 +52,7 @@ public:
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
// Emission of machine code through MCJIT is not supported.
bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_ostream &,
bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &,
bool = true) override {
return true;
}

5
llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
View File

@ -208,7 +208,7 @@ namespace {
public:
DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { }
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
bool is64 = getPointerSize() == 8;
return createPPCMachObjectWriter(
OS,
@ -224,8 +224,7 @@ namespace {
ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) :
PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { }
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
bool is64 = getPointerSize() == 8;
return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI);
}

3
llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
View File

@ -412,7 +412,8 @@ bool PPCELFObjectWriter::needsRelocateWithSymbol(const MCSymbolData &SD,
}
}
MCObjectWriter *llvm::createPPCELFObjectWriter(raw_ostream &OS, bool Is64Bit,
MCObjectWriter *llvm::createPPCELFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
bool IsLittleEndian,
uint8_t OSABI) {
MCELFObjectTargetWriter *MOTW = new PPCELFObjectWriter(Is64Bit, OSABI);

9
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
View File

@ -30,6 +30,7 @@ class MCRegisterInfo;
class MCSubtargetInfo;
class Target;
class StringRef;
class raw_pwrite_stream;
class raw_ostream;
extern Target ThePPC32Target;
@ -44,12 +45,10 @@ MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
/// Construct an PPC ELF object writer.
MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,
bool Is64Bit,
bool IsLittleEndian,
uint8_t OSABI);
MCObjectWriter *createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
bool IsLittleEndian, uint8_t OSABI);
/// Construct a PPC Mach-O object writer.
MCObjectWriter *createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
MCObjectWriter *createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);

4
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
View File

@ -378,8 +378,8 @@ void PPCMachObjectWriter::RecordPPCRelocation(
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
uint32_t CPUType,
MCObjectWriter *llvm::createPPCMachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return createMachObjectWriter(
new PPCMachObjectWriter(Is64Bit, CPUType, CPUSubtype), OS,

4
llvm/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp
View File

@ -24,7 +24,7 @@ namespace {
class AMDGPUMCObjectWriter : public MCObjectWriter {
public:
AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { }
AMDGPUMCObjectWriter(raw_pwrite_stream &OS) : MCObjectWriter(OS, true) {}
void ExecutePostLayoutBinding(MCAssembler &Asm,
const MCAsmLayout &Layout) override {
//XXX: Implement if necessary.
@ -131,7 +131,7 @@ class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
public:
ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createAMDGPUELFObjectWriter(OS);
}
};

2
llvm/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp
View File

@ -33,7 +33,7 @@ protected:
AMDGPUELFObjectWriter::AMDGPUELFObjectWriter()
: MCELFObjectTargetWriter(false, 0, 0, false) { }
MCObjectWriter *llvm::createAMDGPUELFObjectWriter(raw_ostream &OS) {
MCObjectWriter *llvm::createAMDGPUELFObjectWriter(raw_pwrite_stream &OS) {
MCELFObjectTargetWriter *MOTW = new AMDGPUELFObjectWriter();
return createELFObjectWriter(MOTW, OS, true);
}

3
llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
View File

@ -28,6 +28,7 @@ class MCObjectWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class Target;
class raw_pwrite_stream;
class raw_ostream;
extern Target TheAMDGPUTarget;
@ -44,7 +45,7 @@ MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCObjectWriter *createAMDGPUELFObjectWriter(raw_ostream &OS);
MCObjectWriter *createAMDGPUELFObjectWriter(raw_pwrite_stream &OS);
} // End llvm namespace
#define GET_REGINFO_ENUM

2
llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
View File

@ -244,7 +244,7 @@ namespace {
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
return createSparcELFObjectWriter(OS, is64Bit(), OSABI);
}

4
llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
View File

@ -105,8 +105,8 @@ unsigned SparcELFObjectWriter::GetRelocType(const MCValue &Target,
return ELF::R_SPARC_NONE;
}
MCObjectWriter *llvm::createSparcELFObjectWriter(raw_ostream &OS, bool Is64Bit,
uint8_t OSABI) {
MCObjectWriter *llvm::createSparcELFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit, uint8_t OSABI) {
MCELFObjectTargetWriter *MOTW = new SparcELFObjectWriter(Is64Bit, OSABI);
return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/false);
}

4
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
View File

@ -26,6 +26,7 @@ class MCRegisterInfo;
class MCSubtargetInfo;
class Target;
class StringRef;
class raw_pwrite_stream;
class raw_ostream;
extern Target TheSparcTarget;
@ -38,8 +39,7 @@ MCAsmBackend *createSparcAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
StringRef TT,
StringRef CPU);
MCObjectWriter *createSparcELFObjectWriter(raw_ostream &OS,
bool Is64Bit,
MCObjectWriter *createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint8_t OSABI);
} // End llvm namespace

2
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
View File

@ -62,7 +62,7 @@ public:
llvm_unreachable("SystemZ does do not have assembler relaxation");
}
bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createSystemZObjectWriter(OS, OSABI);
}
};

2
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
View File

@ -152,7 +152,7 @@ unsigned SystemZObjectWriter::GetRelocType(const MCValue &Target,
}
}
MCObjectWriter *llvm::createSystemZObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createSystemZObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI) {
MCELFObjectTargetWriter *MOTW = new SystemZObjectWriter(OSABI);
return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/false);

3
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
View File

@ -23,6 +23,7 @@ class MCRegisterInfo;
class MCSubtargetInfo;
class StringRef;
class Target;
class raw_pwrite_stream;
class raw_ostream;
extern Target TheSystemZTarget;
@ -77,7 +78,7 @@ MCAsmBackend *createSystemZMCAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCObjectWriter *createSystemZObjectWriter(raw_ostream &OS, uint8_t OSABI);
MCObjectWriter *createSystemZObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI);
} // end namespace llvm
// Defines symbolic names for SystemZ registers.

2
llvm/lib/Target/TargetMachineC.cpp
View File

@ -183,7 +183,7 @@ void LLVMSetTargetMachineAsmVerbosity(LLVMTargetMachineRef T,
}
static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M,
raw_ostream &OS,
raw_pwrite_stream &OS,
LLVMCodeGenFileType codegen,
char **ErrorMessage) {
TargetMachine* TM = unwrap(T);

12
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
View File

@ -360,7 +360,7 @@ public:
ELFX86_32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
: ELFX86AsmBackend(T, OSABI, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI, ELF::EM_386);
}
};
@ -370,7 +370,7 @@ public:
ELFX86_X32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
: ELFX86AsmBackend(T, OSABI, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI,
ELF::EM_X86_64);
}
@ -381,7 +381,7 @@ public:
ELFX86_64AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU)
: ELFX86AsmBackend(T, OSABI, CPU) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ true, OSABI, ELF::EM_X86_64);
}
};
@ -395,7 +395,7 @@ public:
, Is64Bit(is64Bit) {
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86WinCOFFObjectWriter(OS, Is64Bit);
}
};
@ -752,7 +752,7 @@ public:
StringRef CPU)
: DarwinX86AsmBackend(T, MRI, CPU, false) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86MachObjectWriter(OS, /*Is64Bit=*/false,
MachO::CPU_TYPE_I386,
MachO::CPU_SUBTYPE_I386_ALL);
@ -772,7 +772,7 @@ public:
StringRef CPU, MachO::CPUSubTypeX86 st)
: DarwinX86AsmBackend(T, MRI, CPU, true), Subtype(st) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86MachObjectWriter(OS, /*Is64Bit=*/true,
MachO::CPU_TYPE_X86_64, Subtype);
}

4
llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
View File

@ -249,8 +249,8 @@ unsigned X86ELFObjectWriter::GetRelocType(const MCValue &Target,
return getRelocType32(Modifier, getType32(Type), IsPCRel);
}
MCObjectWriter *llvm::createX86ELFObjectWriter(raw_ostream &OS, bool IsELF64,
uint8_t OSABI,
MCObjectWriter *llvm::createX86ELFObjectWriter(raw_pwrite_stream &OS,
bool IsELF64, uint8_t OSABI,
uint16_t EMachine) {
MCELFObjectTargetWriter *MOTW =
new X86ELFObjectWriter(IsELF64, OSABI, EMachine);

10
llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
View File

@ -31,6 +31,7 @@ class Target;
class Triple;
class StringRef;
class raw_ostream;
class raw_pwrite_stream;
extern Target TheX86_32Target, TheX86_64Target;
@ -77,19 +78,20 @@ MCAsmBackend *createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
///
/// Takes ownership of \p AB and \p CE.
MCStreamer *createX86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB,
raw_ostream &OS, MCCodeEmitter *CE,
raw_pwrite_stream &OS, MCCodeEmitter *CE,
bool RelaxAll);
/// Construct an X86 Mach-O object writer.
MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS, bool Is64Bit,
MCObjectWriter *createX86MachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);
/// Construct an X86 ELF object writer.
MCObjectWriter *createX86ELFObjectWriter(raw_ostream &OS, bool IsELF64,
MCObjectWriter *createX86ELFObjectWriter(raw_pwrite_stream &OS, bool IsELF64,
uint8_t OSABI, uint16_t EMachine);
/// Construct an X86 Win COFF object writer.
MCObjectWriter *createX86WinCOFFObjectWriter(raw_ostream &OS, bool Is64Bit);
MCObjectWriter *createX86WinCOFFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit);
/// Construct X86-64 Mach-O relocation info.
MCRelocationInfo *createX86_64MachORelocationInfo(MCContext &Ctx);

4
llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
View File

@ -575,8 +575,8 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
MCObjectWriter *llvm::createX86MachObjectWriter(raw_ostream &OS, bool Is64Bit,
uint32_t CPUType,
MCObjectWriter *llvm::createX86MachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return createMachObjectWriter(new X86MachObjectWriter(Is64Bit,
CPUType,

2
llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
View File

@ -90,7 +90,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(const MCValue &Target,
llvm_unreachable("Unsupported COFF machine type.");
}
MCObjectWriter *llvm::createX86WinCOFFObjectWriter(raw_ostream &OS,
MCObjectWriter *llvm::createX86WinCOFFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit) {
MCWinCOFFObjectTargetWriter *MOTW = new X86WinCOFFObjectWriter(Is64Bit);
return createWinCOFFObjectWriter(MOTW, OS);

8
llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
View File

@ -18,8 +18,8 @@ class X86WinCOFFStreamer : public MCWinCOFFStreamer {
Win64EH::UnwindEmitter EHStreamer;
public:
X86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB, MCCodeEmitter *CE,
raw_ostream &OS)
: MCWinCOFFStreamer(C, AB, *CE, OS) { }
raw_pwrite_stream &OS)
: MCWinCOFFStreamer(C, AB, *CE, OS) {}
void EmitWinEHHandlerData() override;
void EmitWindowsUnwindTables() override;
@ -49,8 +49,8 @@ void X86WinCOFFStreamer::FinishImpl() {
}
MCStreamer *llvm::createX86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB,
raw_ostream &OS, MCCodeEmitter *CE,
bool RelaxAll) {
raw_pwrite_stream &OS,
MCCodeEmitter *CE, bool RelaxAll) {
X86WinCOFFStreamer *S = new X86WinCOFFStreamer(C, AB, CE, OS);
S->getAssembler().setRelaxAll(RelaxAll);
return S;

12
llvm/tools/llc/llc.cpp
View File

@ -335,6 +335,14 @@ static int compileModule(char **argv, LLVMContext &Context) {
<< ": warning: ignoring -mc-relax-all because filetype != obj";
{
raw_pwrite_stream *OS = &Out->os();
std::unique_ptr<buffer_ostream> BOS;
if (FileType != TargetMachine::CGFT_AssemblyFile &&
!Out->os().supportsSeeking()) {
BOS = make_unique<buffer_ostream>(*OS);
OS = BOS.get();
}
AnalysisID StartAfterID = nullptr;
AnalysisID StopAfterID = nullptr;
const PassRegistry *PR = PassRegistry::getPassRegistry();
@ -356,8 +364,8 @@ static int compileModule(char **argv, LLVMContext &Context) {
}
// Ask the target to add backend passes as necessary.
if (Target->addPassesToEmitFile(PM, Out->os(), FileType, NoVerify,
StartAfterID, StopAfterID)) {
if (Target->addPassesToEmitFile(PM, *OS, FileType, NoVerify, StartAfterID,
StopAfterID)) {
errs() << argv[0] << ": target does not support generation of this"
<< " file type!\n";
return 1;

14
llvm/tools/llvm-mc/llvm-mc.cpp
View File

@ -439,6 +439,8 @@ int main(int argc, char **argv) {
if (!Out)
return 1;
std::unique_ptr<buffer_ostream> BOS;
raw_pwrite_stream *OS = &Out->os();
std::unique_ptr<MCStreamer> Str;
std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
@ -460,7 +462,7 @@ int main(int argc, char **argv) {
CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx);
MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, MCPU);
}
auto FOut = llvm::make_unique<formatted_raw_ostream>(Out->os());
auto FOut = llvm::make_unique<formatted_raw_ostream>(*OS);
Str.reset(TheTarget->createAsmStreamer(
Ctx, std::move(FOut), /*asmverbose*/ true,
/*useDwarfDirectory*/ true, IP, CE, MAB, ShowInst));
@ -469,10 +471,16 @@ int main(int argc, char **argv) {
Str.reset(TheTarget->createNullStreamer(Ctx));
} else {
assert(FileType == OFT_ObjectFile && "Invalid file type!");
if (!Out->os().supportsSeeking()) {
BOS = make_unique<buffer_ostream>(Out->os());
OS = BOS.get();
}
MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, MCPU);
Str.reset(TheTarget->createMCObjectStreamer(TheTriple, Ctx, *MAB, Out->os(),
CE, *STI, RelaxAll,
Str.reset(TheTarget->createMCObjectStreamer(TheTriple, Ctx, *MAB, *OS, CE,
*STI, RelaxAll,
/*DWARFMustBeAtTheEnd*/ false));
if (NoExecStack)
Str->InitSections(true);