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[X86] Mark all instructions that have masked store semantics with NotMemoryFoldable. Remove dependency on SchedRW from memory table autogenerator. 

Previously we were whitelisting in instructions based on their SchedRW value. With the masked store instructions explicitly removed via NotMemoryFoldable, we don't seem to need this check anymore.

llvm-svn: 334563
This commit is contained in:
Craig Topper 2018-06-13 00:04:08 +00:00
parent 4f9cac667b
commit 55488731be
2 changed files with 10 additions and 22 deletions
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14
llvm/lib/Target/X86/X86InstrAVX512.td
View File

@ -835,7 +835,7 @@ multiclass vextract_for_size_split<int Opcode,
"vextract" # To.EltTypeName # "x" # To.NumElts #
"\t{$idx, $src1, $dst {${mask}}|"
"$dst {${mask}}, $src1, $idx}", []>,
EVEX_K, EVEX, Sched<[SchedMR]>;
EVEX_K, EVEX, Sched<[SchedMR]>, NotMemoryFoldable;
}
}
@ -3385,7 +3385,8 @@ multiclass avx512_store<bits<8> opc, string OpcodeStr, string BaseName,
def mrk : AVX512PI<opc, MRMDestMem, (outs),
(ins _.MemOp:$dst, _.KRCWM:$mask, _.RC:$src),
OpcodeStr # "\t{$src, ${dst} {${mask}}|${dst} {${mask}}, $src}",
[], _.ExeDomain>, EVEX, EVEX_K, Sched<[Sched.MR]>;
[], _.ExeDomain>, EVEX, EVEX_K, Sched<[Sched.MR]>,
NotMemoryFoldable;
def: Pat<(mstore addr:$ptr, _.KRCWM:$mask, (_.VT _.RC:$src)),
(!cast<Instruction>(BaseName#_.ZSuffix##mrk) addr:$ptr,
@ -3889,7 +3890,8 @@ multiclass avx512_move_scalar<string asm, SDNode OpNode,
def mrk: AVX512PI<0x11, MRMDestMem, (outs),
(ins _.ScalarMemOp:$dst, VK1WM:$mask, _.FRC:$src),
!strconcat(asm, "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}"),
[], _.ExeDomain>, EVEX, EVEX_K, Sched<[WriteFStore]>;
[], _.ExeDomain>, EVEX, EVEX_K, Sched<[WriteFStore]>,
NotMemoryFoldable;
}
defm VMOVSSZ : avx512_move_scalar<"vmovss", X86Movss, f32x_info>,
@ -8052,7 +8054,7 @@ multiclass avx512_cvtps2ph<X86VectorVTInfo _dest, X86VectorVTInfo _src,
def mrk : AVX512AIi8<0x1D, MRMDestMem, (outs),
(ins x86memop:$dst, _dest.KRCWM:$mask, _src.RC:$src1, i32u8imm:$src2),
"vcvtps2ph\t{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2}", []>,
EVEX_K, Sched<[MR]>;
EVEX_K, Sched<[MR]>, NotMemoryFoldable;
}
}
@ -8644,8 +8646,8 @@ multiclass avx512_trunc_common<bits<8> opc, string OpcodeStr, SDNode OpNode,
def mrk : AVX512XS8I<opc, MRMDestMem, (outs),
(ins x86memop:$dst, SrcInfo.KRCWM:$mask, SrcInfo.RC:$src),
OpcodeStr # "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}", []>,
EVEX, EVEX_K, Sched<[sched.Folded]>;
}//mayStore = 1, mayLoad = 1, hasSideEffects = 0
EVEX, EVEX_K, Sched<[sched.Folded]>, NotMemoryFoldable;
}//mayStore = 1, hasSideEffects = 0
}
multiclass avx512_trunc_mr_lowering<X86VectorVTInfo SrcInfo,

18
llvm/utils/TableGen/X86FoldTablesEmitter.cpp
View File

@ -251,16 +251,6 @@ getMemOperandSize(const Record *MemRec, const bool IntrinsicSensitive = false) {
llvm_unreachable("Memory operand's size not known!");
}
// Returns true if the record's list of defs includes the given def.
static inline bool hasDefInList(const Record *Rec, const StringRef List,
const StringRef Def) {
if (!Rec->isValueUnset(List)) {
return any_of(*(Rec->getValueAsListInit(List)),
[Def](const Init *I) { return I->getAsString() == Def; });
}
return false;
}
// Return true if the instruction defined as a register flavor.
static inline bool hasRegisterFormat(const Record *Inst) {
const BitsInit *FormBits = Inst->getValueAsBitsInit("FormBits");
@ -515,12 +505,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr,
unsigned MemInSize = MemRec->getValueAsDag("InOperandList")->getNumArgs();
unsigned RegInSize = RegRec->getValueAsDag("InOperandList")->getNumArgs();
// Instructions which have the WriteRMW value (Read-Modify-Write) should be
// added to Table2Addr.
if ((hasDefInList(MemRec, "SchedRW", "WriteRMW") ||
hasDefInList(MemRec, "SchedRW", "WriteADCRMW") ||
hasDefInList(MemRec, "SchedRW", "WriteALURMW")) &&
MemOutSize != RegOutSize && MemInSize == RegInSize) {
// Instructions which Read-Modify-Write should be added to Table2Addr.
if (MemOutSize != RegOutSize && MemInSize == RegInSize) {
addEntryWithFlags(Table2Addr, RegInstr, MemInstr, S, 0);
return;
}