forked from OSchip/llvm-project
[DAG] visitSRL - pull out ShiftVT. NFC.
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@ -9332,6 +9332,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
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return V;
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EVT VT = N0.getValueType();
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EVT ShiftVT = N1.getValueType();
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unsigned OpSizeInBits = VT.getScalarSizeInBits();
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// fold (srl c1, c2) -> c1 >>u c2
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@ -9373,7 +9374,6 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
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};
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if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchInRange)) {
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SDLoc DL(N);
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EVT ShiftVT = N1.getValueType();
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SDValue Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, N1, N0.getOperand(1));
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return DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), Sum);
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}
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