forked from OSchip/llvm-project
parent
498f2fd11b
commit
54acedf88f
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@ -1,4 +1,4 @@
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; This test makes sure that urem instructions are properly eliminated.
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; This test makes sure that rem instructions are properly eliminated.
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;
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;
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; END.
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; END.
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@ -25,6 +25,28 @@ define i32 @test3(i32 %A) {
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ret i32 %B
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ret i32 %B
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}
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}
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; FIXME: This could be an 'and' just like above.
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define <2 x i32> @vec_power_of_2_constant_splat_divisor(<2 x i32> %A) {
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; CHECK-LABEL: @vec_power_of_2_constant_splat_divisor(
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; CHECK-NEXT: [[B:%.*]] = urem <2 x i32> %A, <i32 8, i32 8>
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; CHECK-NEXT: ret <2 x i32> [[B]]
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;
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%B = urem <2 x i32> %A, <i32 8, i32 8>
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ret <2 x i32> %B
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}
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; FIXME: And it shouldn't matter whether we have ConstantVector or ConstantDataVector.
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define <2 x i19> @weird_vec_power_of_2_constant_splat_divisor(<2 x i19> %A) {
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; CHECK-LABEL: @weird_vec_power_of_2_constant_splat_divisor(
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; CHECK-NEXT: [[B:%.*]] = urem <2 x i19> %A, <i19 8, i19 8>
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; CHECK-NEXT: ret <2 x i19> [[B]]
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;
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%B = urem <2 x i19> %A, <i19 8, i19 8>
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ret <2 x i19> %B
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}
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define i1 @test3a(i32 %A) {
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define i1 @test3a(i32 %A) {
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; CHECK-LABEL: @test3a(
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; CHECK-LABEL: @test3a(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 7
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; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 7
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