forked from OSchip/llvm-project
[CodeGen] Skip some instructions that shouldn't affect shrink-wrapping
r320606 checked for MI.isMetaInstruction which skips all DBG_VALUEs. This also skips IMPLICIT_DEFs and other instructions that may def / read a register. Differential Revision: https://reviews.llvm.org/D42119 llvm-svn: 322584
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@ -240,10 +240,6 @@ INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
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bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
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RegScavenger *RS) const {
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// Ignore DBG_VALUE and other meta instructions that must not affect codegen.
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if (MI.isMetaInstruction())
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return false;
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if (MI.getOpcode() == FrameSetupOpcode ||
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MI.getOpcode() == FrameDestroyOpcode) {
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DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
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@ -252,6 +248,9 @@ bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
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for (const MachineOperand &MO : MI.operands()) {
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bool UseOrDefCSR = false;
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if (MO.isReg()) {
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// Ignore instructions like DBG_VALUE which don't read/def the register.
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if (!MO.isDef() && !MO.readsReg())
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continue;
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unsigned PhysReg = MO.getReg();
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if (!PhysReg)
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continue;
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@ -267,7 +266,8 @@ bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
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}
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}
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}
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if (UseOrDefCSR || MO.isFI()) {
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// Skip FrameIndex operands in DBG_VALUE instructions.
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if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
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DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
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<< MO.isFI() << "): " << MI << '\n');
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return true;
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