forked from OSchip/llvm-project
AMDGPU: Fix using unencodable instructions in tests
There are a number of MIR tests using instructions on subtargets where they don't really exist. These are some of the easy cases that don't require splitting up test functions.
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@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -march=amdgcn -verify-machineinstrs -stop-after=amdgpu-isel -o - %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs -stop-after=amdgpu-isel -o - %s | FileCheck -check-prefix=GCN %s
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define amdgpu_cs void @mmo_offsets0(<4 x i32> addrspace(6)* inreg noalias dereferenceable(18446744073709551615) %arg0, i32 %arg1) {
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; GCN-LABEL: name: mmo_offsets0
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@ -1,4 +1,4 @@
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: test_part_fold{{$}}
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# GCN: %2:sreg_32 = S_ADD_I32 70, %1
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@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-i1-copies %s -o - | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-i1-copies %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: kernel_i1_copy_phi_with_phi_incoming_value
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@ -337,7 +337,7 @@ body: |
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# GCN: dead early-clobber %4:vreg_128, dead early-clobber %3:vreg_128, dead early-clobber %5:vgpr_32 = BUNDLE %0, %2, %1, implicit $exec {
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# GCN-NEXT: dead %3:vreg_128 = IMAGE_SAMPLE_LZ_V4_V2 %0, %1, %2, 15, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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# GCN-NEXT: dead %4:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, 0, 0, implicit $exec
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# GCN-NEXT: dead %5:vgpr_32 = BUFFER_LOAD_DWORD_ADDR64 %0, %2, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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# GCN-NEXT: dead %5:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET %2, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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# GCN-NEXT: }
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---
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@ -357,7 +357,7 @@ body: |
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%2 = IMPLICIT_DEF
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%3:vreg_128 = IMAGE_SAMPLE_LZ_V4_V2 %0, %1, %2, 15, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (load 16)
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%4:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, 0, 0, implicit $exec
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%5:vgpr_32 = BUFFER_LOAD_DWORD_ADDR64 %0, %2, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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%5:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET %2, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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...
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# GCN-LABEL: {{^}}name: atomic{{$}}
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@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-remove-short-exec-branches -amdgpu-skip-threshold=10 -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-remove-short-exec-branches -amdgpu-skip-threshold=10 -verify-machineinstrs %s -o - | FileCheck %s
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# Make sure mandatory skips are not removed around mode defs.
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# FIXME: -amdgpu-skip-threshold seems to be backwards.
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-fix-sgpr-copies %s -o - | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-fix-sgpr-copies %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: s_add_co_pseudo_test
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tracksRegLiveness: true
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@ -1,4 +1,4 @@
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# RUN: llc -march=amdgcn -run-pass si-insert-waitcnts %s -o - | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-insert-waitcnts %s -o - | FileCheck %s
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--- |
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define amdgpu_kernel void @basic_insert_dcache_wb() {
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@ -1,4 +1,4 @@
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# RUN: llc -march=amdgcn -verify-machineinstrs -start-before si-shrink-instructions -stop-before si-insert-skips -o - %s | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -start-before si-shrink-instructions -stop-before si-insert-skips -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: subbrev{{$}}
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# GCN: V_SUBBREV_U32_e32 0, undef $vgpr0, implicit-def $vcc, implicit killed $vcc, implicit $exec
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# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: smrd_vgpr_offset_imm
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# GCN: V_READFIRSTLANE_B32
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@ -254,7 +254,7 @@ body: |
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bb.1:
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successors: %bb.2
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S_WAITCNT 0
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$vgpr2 = V_ADD_I32_e32 $vgpr1, $vgpr1, implicit-def $vcc, implicit $exec
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$vgpr2, $vcc_lo = V_ADD_I32_e64 $vgpr1, $vgpr1, 0, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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@ -1,4 +1,4 @@
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# RUN: llc -o - %s -march=amdgcn -run-pass=si-insert-waitcnts -verify-machineinstrs | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-insert-waitcnts -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
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# Check that the waitcnt propogates info in the case of a single basic block loop
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@ -1,11 +1,11 @@
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck -check-prefixes=GCN %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck -check-prefixes=GCN %s
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# GCN-LABEL: name: test{{$}}
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# GCN: S_WAITCNT -16257
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# GCN: DS_READ2_B32
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# GCN: DS_READ2_B32
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# GCN: S_WAITCNT 383{{$}}
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# GCN-NEXT: $vgpr1 = V_ADD_U32_e32 1, killed $vgpr1, implicit $exec
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# GCN-NEXT: $vgpr1 = V_OR_B32_e32 1, killed $vgpr1, implicit $exec
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# GCN-NEXT: $vgpr1 = V_MAX_U32_e32 killed $vgpr0, killed $vgpr1, implicit $exec
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# GCN-NEXT: S_WAITCNT 127{{$}}
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# GCN-NEXT: $vgpr1 = V_MAX_U32_e32 killed $vgpr2, killed $vgpr1, implicit $exec
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S_WAITCNT -16257
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renamable $vgpr0_vgpr1 = DS_READ2_B32 renamable $vgpr13, 0, 1, 0, implicit $m0, implicit $exec
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renamable $vgpr2_vgpr3 = DS_READ2_B32 renamable $vgpr13, 2, 3, 0, implicit $m0, implicit $exec
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renamable $vgpr1 = V_ADD_U32_e32 1, killed $vgpr1, implicit $exec
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renamable $vgpr1 = V_OR_B32_e32 1, killed $vgpr1, implicit $exec
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renamable $vgpr1 = V_MAX_U32_e32 killed $vgpr0, killed $vgpr1, implicit $exec
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renamable $vgpr1 = V_MAX_U32_e32 killed $vgpr2, killed $vgpr1, implicit $exec
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renamable $vgpr1 = V_MAX_U32_e32 killed $vgpr3, killed $vgpr1, implicit $exec
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@ -1,4 +1,4 @@
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-wqm -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass si-wqm -o - %s | FileCheck %s
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---
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# Check for awareness that s_or_saveexec_b64 clobbers SCC
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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registers:
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- { id: 0, class: sgpr_32, preferred-register: '' }
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- { id: 1, class: sgpr_32, preferred-register: '' }
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- { id: 2, class: sgpr_32, preferred-register: '' }
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- { id: 10, class: sreg_32, preferred-register: '' }
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- { id: 11, class: vgpr_32, preferred-register: '' }
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- { id: 12, class: vgpr_32, preferred-register: '' }
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liveins:
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liveins:
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- { reg: '$sgpr0', virtual-reg: '%0' }
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- { reg: '$sgpr1', virtual-reg: '%1' }
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- { reg: '$sgpr2', virtual-reg: '%2' }
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
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%3 = COPY $vgpr0
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%2 = COPY $sgpr2
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%1 = COPY $sgpr1
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