forked from OSchip/llvm-project
Use the BuildMI overload that sets up a destination register
instead of the one that doesn't and then adding it manually. llvm-svn: 55006
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@ -70,10 +70,9 @@ unsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode,
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const TargetRegisterClass* RC) {
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MachineRegisterInfo &MRI = MF->getRegInfo();
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const TargetInstrDesc &II = TII->get(MachineInstOpcode);
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MachineInstr *MI = BuildMI(*MF, II);
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unsigned ResultReg = MRI.createVirtualRegister(RC);
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MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
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MachineInstr *MI = BuildMI(*MF, II, ResultReg);
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MBB->push_back(MI);
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return ResultReg;
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@ -84,10 +83,9 @@ unsigned FastISel::FastEmitInst_r(unsigned MachineInstOpcode,
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unsigned Op0) {
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MachineRegisterInfo &MRI = MF->getRegInfo();
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const TargetInstrDesc &II = TII->get(MachineInstOpcode);
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MachineInstr *MI = BuildMI(*MF, II);
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unsigned ResultReg = MRI.createVirtualRegister(RC);
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MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
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MachineInstr *MI = BuildMI(*MF, II, ResultReg);
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MI->addOperand(MachineOperand::CreateReg(Op0, false));
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MBB->push_back(MI);
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@ -99,10 +97,9 @@ unsigned FastISel::FastEmitInst_rr(unsigned MachineInstOpcode,
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unsigned Op0, unsigned Op1) {
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MachineRegisterInfo &MRI = MF->getRegInfo();
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const TargetInstrDesc &II = TII->get(MachineInstOpcode);
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MachineInstr *MI = BuildMI(*MF, II);
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unsigned ResultReg = MRI.createVirtualRegister(RC);
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MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
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MachineInstr *MI = BuildMI(*MF, II, ResultReg);
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MI->addOperand(MachineOperand::CreateReg(Op0, false));
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MI->addOperand(MachineOperand::CreateReg(Op1, false));
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