[X86] Add icelake CPU support for -march.

llvm-svn: 318617
This commit is contained in:
Craig Topper 2017-11-19 02:55:15 +00:00
parent 222c1725cd
commit 546cee4170
5 changed files with 102 additions and 0 deletions

View File

@ -139,6 +139,10 @@ PROC_ALIAS(SkylakeServer, "skx")
/// Cannonlake client microarchitecture based processors.
PROC(Cannonlake, "cannonlake", PROC_64_BIT)
/// \name Icelake Client
/// Icelake client microarchitecture based processors.
PROC(Icelake, "icelake", PROC_64_BIT)
/// \name Knights Landing
/// Knights Landing processor.
PROC(KNL, "knl", PROC_64_BIT)

View File

@ -130,6 +130,9 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "mmx", true);
break;
case CK_Icelake:
// TODO: Add icelake features here.
LLVM_FALLTHROUGH;
case CK_Cannonlake:
setFeatureEnabledImpl(Features, "avx512ifma", true);
setFeatureEnabledImpl(Features, "avx512vbmi", true);
@ -838,6 +841,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
case CK_SkylakeClient:
case CK_SkylakeServer:
case CK_Cannonlake:
case CK_Icelake:
// FIXME: Historically, we defined this legacy name, it would be nice to
// remove it at some point. We've never exposed fine-grained names for
// recent primary x86 CPUs, and we should keep it that way.

View File

@ -60,6 +60,10 @@
// RUN: | FileCheck %s -check-prefix=cannonlake
// cannonlake: "-target-cpu" "cannonlake"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake 2>&1 \
// RUN: | FileCheck %s -check-prefix=icelake
// icelake: "-target-cpu" "icelake"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \
// RUN: | FileCheck %s -check-prefix=lakemont
// lakemont: "-target-cpu" "lakemont"

View File

@ -13,6 +13,7 @@
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu skylake-avx512 -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu skx -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu cannonlake -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu icelake -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu knl -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu bonnell -verify %s
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu silvermont -verify %s

View File

@ -1033,6 +1033,95 @@
// CHECK_CNL_M64: #define __x86_64 1
// CHECK_CNL_M64: #define __x86_64__ 1
// RUN: %clang -march=icelake -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ICL_M32
// CHECK_ICL_M32: #define __AES__ 1
// CHECK_ICL_M32: #define __AVX2__ 1
// CHECK_ICL_M32: #define __AVX512BW__ 1
// CHECK_ICL_M32: #define __AVX512CD__ 1
// CHECK_ICL_M32: #define __AVX512DQ__ 1
// CHECK_ICL_M32: #define __AVX512F__ 1
// CHECK_ICL_M32: #define __AVX512IFMA__ 1
// CHECK_ICL_M32: #define __AVX512VBMI__ 1
// CHECK_ICL_M32: #define __AVX512VL__ 1
// CHECK_ICL_M32: #define __AVX__ 1
// CHECK_ICL_M32: #define __BMI2__ 1
// CHECK_ICL_M32: #define __BMI__ 1
// CHECK_ICL_M32: #define __CLFLUSHOPT__ 1
// CHECK_ICL_M32: #define __F16C__ 1
// CHECK_ICL_M32: #define __FMA__ 1
// CHECK_ICL_M32: #define __LZCNT__ 1
// CHECK_ICL_M32: #define __MMX__ 1
// CHECK_ICL_M32: #define __MPX__ 1
// CHECK_ICL_M32: #define __PCLMUL__ 1
// CHECK_ICL_M32: #define __POPCNT__ 1
// CHECK_ICL_M32: #define __RDRND__ 1
// CHECK_ICL_M32: #define __RTM__ 1
// CHECK_ICL_M32: #define __SGX__ 1
// CHECK_ICL_M32: #define __SHA__ 1
// CHECK_ICL_M32: #define __SSE2__ 1
// CHECK_ICL_M32: #define __SSE3__ 1
// CHECK_ICL_M32: #define __SSE4_1__ 1
// CHECK_ICL_M32: #define __SSE4_2__ 1
// CHECK_ICL_M32: #define __SSE__ 1
// CHECK_ICL_M32: #define __SSSE3__ 1
// CHECK_ICL_M32: #define __XSAVEC__ 1
// CHECK_ICL_M32: #define __XSAVEOPT__ 1
// CHECK_ICL_M32: #define __XSAVES__ 1
// CHECK_ICL_M32: #define __XSAVE__ 1
// CHECK_ICL_M32: #define __corei7 1
// CHECK_ICL_M32: #define __corei7__ 1
// CHECK_ICL_M32: #define __i386 1
// CHECK_ICL_M32: #define __i386__ 1
// CHECK_ICL_M32: #define __tune_corei7__ 1
// CHECK_ICL_M32: #define i386 1
//
// RUN: %clang -march=icelake -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ICL_M64
// CHECK_ICL_M64: #define __AES__ 1
// CHECK_ICL_M64: #define __AVX2__ 1
// CHECK_ICL_M64: #define __AVX512BW__ 1
// CHECK_ICL_M64: #define __AVX512CD__ 1
// CHECK_ICL_M64: #define __AVX512DQ__ 1
// CHECK_ICL_M64: #define __AVX512F__ 1
// CHECK_ICL_M64: #define __AVX512IFMA__ 1
// CHECK_ICL_M64: #define __AVX512VBMI__ 1
// CHECK_ICL_M64: #define __AVX512VL__ 1
// CHECK_ICL_M64: #define __AVX__ 1
// CHECK_ICL_M64: #define __BMI2__ 1
// CHECK_ICL_M64: #define __BMI__ 1
// CHECK_ICL_M64: #define __CLFLUSHOPT__ 1
// CHECK_ICL_M64: #define __F16C__ 1
// CHECK_ICL_M64: #define __FMA__ 1
// CHECK_ICL_M64: #define __LZCNT__ 1
// CHECK_ICL_M64: #define __MMX__ 1
// CHECK_ICL_M64: #define __MPX__ 1
// CHECK_ICL_M64: #define __PCLMUL__ 1
// CHECK_ICL_M64: #define __POPCNT__ 1
// CHECK_ICL_M64: #define __RDRND__ 1
// CHECK_ICL_M64: #define __RTM__ 1
// CHECK_ICL_M64: #define __SGX__ 1
// CHECK_ICL_M64: #define __SHA__ 1
// CHECK_ICL_M64: #define __SSE2__ 1
// CHECK_ICL_M64: #define __SSE3__ 1
// CHECK_ICL_M64: #define __SSE4_1__ 1
// CHECK_ICL_M64: #define __SSE4_2__ 1
// CHECK_ICL_M64: #define __SSE__ 1
// CHECK_ICL_M64: #define __SSSE3__ 1
// CHECK_ICL_M64: #define __XSAVEC__ 1
// CHECK_ICL_M64: #define __XSAVEOPT__ 1
// CHECK_ICL_M64: #define __XSAVES__ 1
// CHECK_ICL_M64: #define __XSAVE__ 1
// CHECK_ICL_M64: #define __amd64 1
// CHECK_ICL_M64: #define __amd64__ 1
// CHECK_ICL_M64: #define __corei7 1
// CHECK_ICL_M64: #define __corei7__ 1
// CHECK_ICL_M64: #define __tune_corei7__ 1
// CHECK_ICL_M64: #define __x86_64 1
// CHECK_ICL_M64: #define __x86_64__ 1
// RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ATOM_M32