forked from OSchip/llvm-project
[x86] add tests for extracted scalar casts (PR39974); NFC
https://bugs.llvm.org/show_bug.cgi?id=39974 llvm-svn: 351354
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Sanjay Patel
parent
d38bd4ee82
commit
546c9f6d8f
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@ -5550,3 +5550,208 @@ define <4 x float> @sitofp_i64_to_4f32(<4 x float> %a0, i64 %a1) nounwind {
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%res = insertelement <4 x float> %a0, float %cvt, i32 0
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ret <4 x float> %res
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}
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; Extract from int vector and convert to FP.
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define float @extract0_sitofp_v4i32_f32(<4 x i32> %x) nounwind {
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; SSE-LABEL: extract0_sitofp_v4i32_f32:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: cvtsi2ssl %eax, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: extract0_sitofp_v4i32_f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovd %xmm0, %eax
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; AVX-NEXT: vcvtsi2ssl %eax, %xmm1, %xmm0
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; AVX-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 0
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%r = sitofp i32 %e to float
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ret float %r
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}
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define double @extract0_sitofp_v4i32_f64(<4 x i32> %x) nounwind {
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; SSE-LABEL: extract0_sitofp_v4i32_f64:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: cvtsi2sdl %eax, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: extract0_sitofp_v4i32_f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovd %xmm0, %eax
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; AVX-NEXT: vcvtsi2sdl %eax, %xmm1, %xmm0
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; AVX-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 0
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%r = sitofp i32 %e to double
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ret double %r
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}
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define float @extract0_uitofp_v4i32_f32(<4 x i32> %x) nounwind {
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; SSE-LABEL: extract0_uitofp_v4i32_f32:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: cvtsi2ssq %rax, %xmm0
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; SSE-NEXT: retq
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;
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; VEX-LABEL: extract0_uitofp_v4i32_f32:
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; VEX: # %bb.0:
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; VEX-NEXT: vmovd %xmm0, %eax
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; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm0
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; VEX-NEXT: retq
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;
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; AVX512-LABEL: extract0_uitofp_v4i32_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovd %xmm0, %eax
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; AVX512-NEXT: vcvtusi2ssl %eax, %xmm1, %xmm0
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; AVX512-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 0
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%r = uitofp i32 %e to float
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ret float %r
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}
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define double @extract0_uitofp_v4i32_f64(<4 x i32> %x) nounwind {
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; SSE-LABEL: extract0_uitofp_v4i32_f64:
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; SSE: # %bb.0:
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: cvtsi2sdq %rax, %xmm0
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; SSE-NEXT: retq
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;
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; VEX-LABEL: extract0_uitofp_v4i32_f64:
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; VEX: # %bb.0:
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; VEX-NEXT: vmovd %xmm0, %eax
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; VEX-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm0
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; VEX-NEXT: retq
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;
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; AVX512-LABEL: extract0_uitofp_v4i32_f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovd %xmm0, %eax
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; AVX512-NEXT: vcvtusi2sdl %eax, %xmm1, %xmm0
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; AVX512-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 0
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%r = uitofp i32 %e to double
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ret double %r
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}
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; Extract non-zero element from int vector and convert to FP.
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define float @extract3_sitofp_v4i32_f32(<4 x i32> %x) nounwind {
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; SSE2-LABEL: extract3_sitofp_v4i32_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: xorps %xmm0, %xmm0
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; SSE2-NEXT: cvtsi2ssl %eax, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract3_sitofp_v4i32_f32:
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; SSE41: # %bb.0:
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; SSE41-NEXT: extractps $3, %xmm0, %eax
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; SSE41-NEXT: xorps %xmm0, %xmm0
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; SSE41-NEXT: cvtsi2ssl %eax, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: extract3_sitofp_v4i32_f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vextractps $3, %xmm0, %eax
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; AVX-NEXT: vcvtsi2ssl %eax, %xmm1, %xmm0
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; AVX-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 3
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%r = sitofp i32 %e to float
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ret float %r
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}
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define double @extract3_sitofp_v4i32_f64(<4 x i32> %x) nounwind {
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; SSE2-LABEL: extract3_sitofp_v4i32_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: xorps %xmm0, %xmm0
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; SSE2-NEXT: cvtsi2sdl %eax, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract3_sitofp_v4i32_f64:
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; SSE41: # %bb.0:
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; SSE41-NEXT: extractps $3, %xmm0, %eax
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; SSE41-NEXT: xorps %xmm0, %xmm0
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; SSE41-NEXT: cvtsi2sdl %eax, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: extract3_sitofp_v4i32_f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vextractps $3, %xmm0, %eax
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; AVX-NEXT: vcvtsi2sdl %eax, %xmm1, %xmm0
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; AVX-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 3
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%r = sitofp i32 %e to double
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ret double %r
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}
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define float @extract3_uitofp_v4i32_f32(<4 x i32> %x) nounwind {
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; SSE2-LABEL: extract3_uitofp_v4i32_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: xorps %xmm0, %xmm0
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; SSE2-NEXT: cvtsi2ssq %rax, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract3_uitofp_v4i32_f32:
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; SSE41: # %bb.0:
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; SSE41-NEXT: extractps $3, %xmm0, %eax
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; SSE41-NEXT: xorps %xmm0, %xmm0
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; SSE41-NEXT: cvtsi2ssq %rax, %xmm0
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; SSE41-NEXT: retq
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;
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; VEX-LABEL: extract3_uitofp_v4i32_f32:
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; VEX: # %bb.0:
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; VEX-NEXT: vextractps $3, %xmm0, %eax
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; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm0
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; VEX-NEXT: retq
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;
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; AVX512-LABEL: extract3_uitofp_v4i32_f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vextractps $3, %xmm0, %eax
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; AVX512-NEXT: vcvtusi2ssl %eax, %xmm1, %xmm0
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; AVX512-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 3
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%r = uitofp i32 %e to float
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ret float %r
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}
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define double @extract3_uitofp_v4i32_f64(<4 x i32> %x) nounwind {
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; SSE2-LABEL: extract3_uitofp_v4i32_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: xorps %xmm0, %xmm0
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; SSE2-NEXT: cvtsi2sdq %rax, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract3_uitofp_v4i32_f64:
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; SSE41: # %bb.0:
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; SSE41-NEXT: extractps $3, %xmm0, %eax
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; SSE41-NEXT: xorps %xmm0, %xmm0
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; SSE41-NEXT: cvtsi2sdq %rax, %xmm0
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; SSE41-NEXT: retq
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;
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; VEX-LABEL: extract3_uitofp_v4i32_f64:
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; VEX: # %bb.0:
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; VEX-NEXT: vextractps $3, %xmm0, %eax
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; VEX-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm0
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; VEX-NEXT: retq
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;
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; AVX512-LABEL: extract3_uitofp_v4i32_f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vextractps $3, %xmm0, %eax
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; AVX512-NEXT: vcvtusi2sdl %eax, %xmm1, %xmm0
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; AVX512-NEXT: retq
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%e = extractelement <4 x i32> %x, i32 3
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%r = uitofp i32 %e to double
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ret double %r
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}
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