forked from OSchip/llvm-project
Added RFE for disassembly only.
B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the specified address and the following word respectively. llvm-svn: 96519
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@ -957,7 +957,7 @@ def SVC : ABI<0b1111, (outs), (ins i32imm:$svc), IIC_Br, "svc", "\t$svc",
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[/* For disassembly only; pattern left blank */]>;
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}
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// Store Return State -- for disassembly only
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// Store Return State is a system instruction -- for disassembly only
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def SRSW : ABXI<{1,0,0,?}, (outs), (ins addrmode4:$addr, i32imm:$mode),
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NoItinerary, "srs${addr:submode}\tsp!, $mode",
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[/* For disassembly only; pattern left blank */]> {
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@ -972,6 +972,21 @@ def SRS : ABXI<{1,0,0,?}, (outs), (ins addrmode4:$addr, i32imm:$mode),
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let Inst{22-20} = 0b100; // W = 0
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}
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// Return From Exception is a system instruction -- for disassembly only
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def RFEW : ABXI<{1,0,0,?}, (outs), (ins addrmode4:$addr, GPR:$base),
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NoItinerary, "rfe${addr:submode}\t$base!",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{31-28} = 0b1111;
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let Inst{22-20} = 0b011; // W = 1
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}
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def RFE : ABXI<{1,0,0,?}, (outs), (ins addrmode4:$addr, GPR:$base),
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NoItinerary, "rfe${addr:submode}\t$base",
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[/* For disassembly only; pattern left blank */]> {
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let Inst{31-28} = 0b1111;
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let Inst{22-20} = 0b001; // W = 0
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}
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//===----------------------------------------------------------------------===//
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// Load / store Instructions.
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//
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