forked from OSchip/llvm-project
parent
e89461a400
commit
540d133138
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@ -212,7 +212,7 @@ void RenameIndependentSubregs::rewriteOperands(const IntEqClasses &Classes,
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const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
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const SmallVectorImpl<LiveInterval*> &Intervals) const {
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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unsigned Reg = Intervals[0]->reg;;
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unsigned Reg = Intervals[0]->reg;
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for (MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(Reg),
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E = MRI->reg_nodbg_end(); I != E; ) {
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MachineOperand &MO = *I++;
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