forked from OSchip/llvm-project
[InstCombine][NFC] Add last few tests with constant mask for masked merge folding.
A followup for rL330003 https://bugs.llvm.org/show_bug.cgi?id=6773 llvm-svn: 330007
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@ -427,6 +427,33 @@ define i32 @xor_commutative6(i32 %x, i32 %y, i32 %m) {
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ret i32 %xor
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}
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define i32 @or_constmask_commutative(i32 %x, i32 %y) {
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; CHECK-LABEL: @or_constmask_commutative(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[AND1]], [[AND]]
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; CHECK-NEXT: ret i32 [[OR]]
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;
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%and = and i32 %x, 65280
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%and1 = and i32 %y, -65281
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%or = or i32 %and1, %and ; swapped order
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ret i32 %or
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}
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define i32 @xor_constmask_commutative(i32 %x, i32 %y) {
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; CHECK-LABEL: @xor_constmask_commutative(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
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; CHECK-NEXT: [[XOR1:%.*]] = or i32 [[AND1]], [[AND]]
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%and = and i32 %x, 65280
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%and1 = and i32 %y, -65281
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%xor = xor i32 %and1, %and ; swapped order
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ret i32 %xor
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}
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; ============================================================================ ;
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; Negative tests. Should not be folded.
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; ============================================================================ ;
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@ -477,6 +504,44 @@ define i32 @n0_xor_oneuse(i32 %x, i32 %y, i32 %m) {
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ret i32 %xor
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}
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define i32 @n0_or_constmask_oneuse(i32 %x, i32 %y) {
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; CHECK-LABEL: @n0_or_constmask_oneuse(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[AND]], [[AND1]]
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; CHECK-NEXT: call void @use32(i32 [[AND]])
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; CHECK-NEXT: call void @use32(i32 [[AND1]])
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; CHECK-NEXT: call void @use32(i32 [[OR]])
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; CHECK-NEXT: ret i32 [[OR]]
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;
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%and = and i32 %x, 65280
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%and1 = and i32 %y, -65281
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%or = or i32 %and, %and1
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call void @use32(i32 %and)
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call void @use32(i32 %and1)
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call void @use32(i32 %or)
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ret i32 %or
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}
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define i32 @n0_xor_constmask_oneuse(i32 %x, i32 %y) {
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; CHECK-LABEL: @n0_xor_constmask_oneuse(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
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; CHECK-NEXT: [[XOR1:%.*]] = or i32 [[AND]], [[AND1]]
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; CHECK-NEXT: call void @use32(i32 [[AND]])
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; CHECK-NEXT: call void @use32(i32 [[AND1]])
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; CHECK-NEXT: call void @use32(i32 [[XOR1]])
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; CHECK-NEXT: ret i32 [[XOR1]]
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;
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%and = and i32 %x, 65280
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%and1 = and i32 %y, -65281
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%xor = xor i32 %and, %and1
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call void @use32(i32 %and)
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call void @use32(i32 %and1)
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call void @use32(i32 %xor)
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ret i32 %xor
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}
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; Bad xor constant
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define i32 @n1_or_badxor(i32 %x, i32 %y, i32 %m) {
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@ -560,11 +625,11 @@ define i32 @n3_xor_constmask_badmask(i32 %x, i32 %y) {
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; CHECK-LABEL: @n3_xor_constmask_badmask(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65280
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; CHECK-NEXT: [[OR:%.*]] = xor i32 [[AND]], [[AND1]]
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; CHECK-NEXT: ret i32 [[OR]]
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[AND]], [[AND1]]
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; CHECK-NEXT: ret i32 [[XOR]]
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;
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%and = and i32 %x, 65280
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%and1 = and i32 %y, -65280 ; not -65281
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%or = xor i32 %and, %and1
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ret i32 %or
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%xor = xor i32 %and, %and1
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ret i32 %xor
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}
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