forked from OSchip/llvm-project
[LoongArch] Add LoongArch support to update_llc_test_checks
Add LoongArch assembly scrubbing and triple support to update_llc_test_checks. Depends on D128432 Reviewed By: MaskRay, xen0n Differential Revision: https://reviews.llvm.org/D128433
This commit is contained in:
wanglei
Weining Lu
parent
4270c9cd44
commit
53d5aceb70
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@ -0,0 +1,8 @@
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; Check that we accept functions with '$' in the name.
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; RUN: llc -mtriple=loongarch32-unknown-linux < %s | FileCheck %s
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define hidden i32 @"_Z54bar$ompvariant$bar"() {
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entry:
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ret i32 2
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}
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@ -0,0 +1,13 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Check that we accept functions with '$' in the name.
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; RUN: llc -mtriple=loongarch32-unknown-linux < %s | FileCheck %s
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define hidden i32 @"_Z54bar$ompvariant$bar"() {
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; CHECK-LABEL: _Z54bar$ompvariant$bar:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: jirl $zero, $ra, 0
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entry:
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ret i32 2
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}
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@ -0,0 +1,63 @@
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; RUN: llc --enable-machine-outliner --mtriple=loongarch32-unknown-linux < %s | FileCheck %s
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@x = dso_local global i32 0, align 4
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define dso_local i32 @check_boundaries() #0 {
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr %2, align 4
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%6 = load i32, ptr %2, align 4
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%7 = icmp ne i32 %6, 0
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br i1 %7, label %9, label %8
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %10
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store i32 1, ptr %4, align 4
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br label %10
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%11 = load i32, ptr %2, align 4
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%12 = icmp ne i32 %11, 0
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br i1 %12, label %14, label %13
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %15
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store i32 1, ptr %4, align 4
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br label %15
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ret i32 0
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}
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define dso_local i32 @main() #0 {
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr @x, align 4
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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store i32 1, ptr @x, align 4
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call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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ret i32 0
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}
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attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
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@ -0,0 +1,148 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --include-generated-funcs
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; RUN: llc --enable-machine-outliner --mtriple=loongarch32-unknown-linux < %s | FileCheck %s
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@x = dso_local global i32 0, align 4
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define dso_local i32 @check_boundaries() #0 {
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr %2, align 4
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%6 = load i32, ptr %2, align 4
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%7 = icmp ne i32 %6, 0
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br i1 %7, label %9, label %8
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %10
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store i32 1, ptr %4, align 4
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br label %10
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%11 = load i32, ptr %2, align 4
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%12 = icmp ne i32 %11, 0
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br i1 %12, label %14, label %13
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %15
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store i32 1, ptr %4, align 4
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br label %15
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ret i32 0
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}
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define dso_local i32 @main() #0 {
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr @x, align 4
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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store i32 1, ptr @x, align 4
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call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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ret i32 0
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}
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attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
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; CHECK-LABEL: check_boundaries:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
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; CHECK-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 1, -4
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; CHECK-NEXT: .cfi_offset 22, -8
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; CHECK-NEXT: addi.w $fp, $sp, 32
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; CHECK-NEXT: .cfi_def_cfa 22, 0
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; CHECK-NEXT: st.w $zero, $fp, -16
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; CHECK-NEXT: st.w $zero, $fp, -12
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; CHECK-NEXT: bnez $zero, .LBB0_2
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; CHECK-NEXT: b .LBB0_1
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: .LBB0_3:
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; CHECK-NEXT: ld.w $a0, $fp, -16
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; CHECK-NEXT: bne $a0, $zero, .LBB0_5
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .LBB0_5:
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: .LBB0_6:
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
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; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 32
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; CHECK-NEXT: jirl $zero, $ra, 0
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 3
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: ori $a0, $zero, 4
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; CHECK-NEXT: st.w $a0, $fp, -28
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; CHECK-NEXT: b .LBB0_3
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; CHECK-NEXT: .LBB0_4:
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 3
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: ori $a0, $zero, 4
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; CHECK-NEXT: st.w $a0, $fp, -28
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; CHECK-NEXT: b .LBB0_6
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;
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; CHECK-LABEL: main:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
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; CHECK-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 1, -4
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; CHECK-NEXT: .cfi_offset 22, -8
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; CHECK-NEXT: addi.w $fp, $sp, 32
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; CHECK-NEXT: .cfi_def_cfa 22, 0
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; CHECK-NEXT: pcalau12i $a0, x
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; CHECK-NEXT: addi.w $a0, $a0, x
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; CHECK-NEXT: ori $a1, $zero, 1
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; CHECK-NEXT: st.w $a1, $a0, 0
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; CHECK-NEXT: st.w $zero, $fp, -12
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; CHECK-NEXT: st.w $a1, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a2, $zero, 3
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; CHECK-NEXT: st.w $a2, $fp, -24
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; CHECK-NEXT: ori $a3, $zero, 4
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; CHECK-NEXT: st.w $a3, $fp, -28
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: st.w $a1, $fp, -16
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; CHECK-NEXT: st.w $a2, $fp, -24
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; CHECK-NEXT: st.w $a3, $fp, -28
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
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; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 32
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; CHECK-NEXT: jirl $zero, $ra, 0
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@ -0,0 +1,147 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --enable-machine-outliner --mtriple=loongarch32-unknown-linux < %s | FileCheck %s
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@x = dso_local global i32 0, align 4
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define dso_local i32 @check_boundaries() #0 {
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; CHECK-LABEL: check_boundaries:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
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; CHECK-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 1, -4
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; CHECK-NEXT: .cfi_offset 22, -8
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; CHECK-NEXT: addi.w $fp, $sp, 32
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; CHECK-NEXT: .cfi_def_cfa 22, 0
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; CHECK-NEXT: st.w $zero, $fp, -16
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; CHECK-NEXT: st.w $zero, $fp, -12
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; CHECK-NEXT: bnez $zero, .LBB0_2
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; CHECK-NEXT: b .LBB0_1
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: .LBB0_3:
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; CHECK-NEXT: ld.w $a0, $fp, -16
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; CHECK-NEXT: bne $a0, $zero, .LBB0_5
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .LBB0_5:
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: .LBB0_6:
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
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; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 32
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; CHECK-NEXT: jirl $zero, $ra, 0
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 3
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: ori $a0, $zero, 4
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; CHECK-NEXT: st.w $a0, $fp, -28
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; CHECK-NEXT: b .LBB0_3
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; CHECK-NEXT: .LBB0_4:
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: st.w $a0, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 3
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; CHECK-NEXT: st.w $a0, $fp, -24
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; CHECK-NEXT: ori $a0, $zero, 4
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; CHECK-NEXT: st.w $a0, $fp, -28
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; CHECK-NEXT: b .LBB0_6
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr %2, align 4
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%6 = load i32, ptr %2, align 4
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%7 = icmp ne i32 %6, 0
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br i1 %7, label %9, label %8
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %10
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store i32 1, ptr %4, align 4
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br label %10
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%11 = load i32, ptr %2, align 4
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%12 = icmp ne i32 %11, 0
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br i1 %12, label %14, label %13
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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br label %15
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store i32 1, ptr %4, align 4
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br label %15
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ret i32 0
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}
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define dso_local i32 @main() #0 {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
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; CHECK-NEXT: st.w $fp, $sp, 24 # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset 1, -4
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; CHECK-NEXT: .cfi_offset 22, -8
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; CHECK-NEXT: addi.w $fp, $sp, 32
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; CHECK-NEXT: .cfi_def_cfa 22, 0
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; CHECK-NEXT: pcalau12i $a0, x
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; CHECK-NEXT: addi.w $a0, $a0, x
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; CHECK-NEXT: ori $a1, $zero, 1
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; CHECK-NEXT: st.w $a1, $a0, 0
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; CHECK-NEXT: st.w $zero, $fp, -12
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; CHECK-NEXT: st.w $a1, $fp, -16
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; CHECK-NEXT: ori $a0, $zero, 2
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: ori $a2, $zero, 3
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; CHECK-NEXT: st.w $a2, $fp, -24
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; CHECK-NEXT: ori $a3, $zero, 4
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; CHECK-NEXT: st.w $a3, $fp, -28
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: st.w $a0, $fp, -20
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; CHECK-NEXT: st.w $a1, $fp, -16
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; CHECK-NEXT: st.w $a2, $fp, -24
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; CHECK-NEXT: st.w $a3, $fp, -28
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
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; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 32
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; CHECK-NEXT: jirl $zero, $ra, 0
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%1 = alloca i32, align 4
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%2 = alloca i32, align 4
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%3 = alloca i32, align 4
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%4 = alloca i32, align 4
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%5 = alloca i32, align 4
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store i32 0, ptr %1, align 4
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store i32 0, ptr @x, align 4
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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store i32 1, ptr @x, align 4
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call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
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store i32 1, ptr %2, align 4
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store i32 2, ptr %3, align 4
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store i32 3, ptr %4, align 4
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store i32 4, ptr %5, align 4
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ret i32 0
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}
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attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
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@ -0,0 +1,5 @@
|
|||
# REQUIRES: loongarch-registered-target
|
||||
## Check that functions names with '$' are processed correctly
|
||||
|
||||
# RUN: cp -f %S/Inputs/loongarch_function_name.ll %t.ll && %update_llc_test_checks %t.ll
|
||||
# RUN: diff -u %S/Inputs/loongarch_function_name.ll.expected %t.ll
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
# REQUIRES: loongarch-registered-target
|
||||
|
||||
## Check that generated functions are included.
|
||||
# RUN: cp -f %S/Inputs/loongarch_generated_funcs.ll %t.ll && %update_llc_test_checks --include-generated-funcs %t.ll
|
||||
# RUN: diff -u %t.ll %S/Inputs/loongarch_generated_funcs.ll.generated.expected
|
||||
|
||||
## Check that running the script again does not change the result:
|
||||
# RUN: %update_llc_test_checks --include-generated-funcs %t.ll
|
||||
# RUN: diff -u %t.ll %S/Inputs/loongarch_generated_funcs.ll.generated.expected
|
||||
|
||||
## Check that generated functions are not included.
|
||||
# RUN: cp -f %S/Inputs/loongarch_generated_funcs.ll %t.ll && %update_llc_test_checks %t.ll
|
||||
# RUN: diff -u %t.ll %S/Inputs/loongarch_generated_funcs.ll.nogenerated.expected
|
||||
|
||||
## Check that running the script again does not change the result:
|
||||
# RUN: %update_llc_test_checks %t.ll
|
||||
# RUN: diff -u %t.ll %S/Inputs/loongarch_generated_funcs.ll.nogenerated.expected
|
||||
|
|
@ -203,6 +203,13 @@ ASM_FUNCTION_NVPTX_RE = re.compile(
|
|||
r'\s*// -- End function',
|
||||
flags=(re.M | re.S))
|
||||
|
||||
ASM_FUNCTION_LOONGARCH_RE = re.compile(
|
||||
r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@"?(?P=func)"?\n'
|
||||
r'(?:\s*\.?Lfunc_begin[^:\n]*:\n)?[^:]*?'
|
||||
r'(?P<body>^##?[ \t]+[^:]+:.*?)\s*'
|
||||
r'.Lfunc_end[0-9]+:\n',
|
||||
flags=(re.M | re.S))
|
||||
|
||||
SCRUB_X86_SHUFFLES_RE = (
|
||||
re.compile(
|
||||
r'^(\s*\w+) [^#\n]+#+ ((?:[xyz]mm\d+|mem)( \{%k\d+\}( \{z\})?)? = .*)$',
|
||||
|
|
@ -423,6 +430,16 @@ def scrub_asm_nvptx(asm, args):
|
|||
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
|
||||
return asm
|
||||
|
||||
def scrub_asm_loongarch(asm, args):
|
||||
# Scrub runs of whitespace out of the assembly, but leave the leading
|
||||
# whitespace in place.
|
||||
asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm)
|
||||
# Expand the tabs used for indentation.
|
||||
asm = string.expandtabs(asm, 2)
|
||||
# Strip trailing whitespace.
|
||||
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
|
||||
return asm
|
||||
|
||||
# Returns a tuple of a scrub function and a function regex. Scrub function is
|
||||
# used to alter function body in some way, for example, remove trailing spaces.
|
||||
# Function regex is used to match function name, body, etc. in raw llc output.
|
||||
|
|
@ -465,7 +482,9 @@ def get_run_handler(triple):
|
|||
'wasm32': (scrub_asm_wasm32, ASM_FUNCTION_WASM32_RE),
|
||||
've': (scrub_asm_ve, ASM_FUNCTION_VE_RE),
|
||||
'csky': (scrub_asm_csky, ASM_FUNCTION_CSKY_RE),
|
||||
'nvptx': (scrub_asm_nvptx, ASM_FUNCTION_NVPTX_RE)
|
||||
'nvptx': (scrub_asm_nvptx, ASM_FUNCTION_NVPTX_RE),
|
||||
'loongarch32': (scrub_asm_loongarch, ASM_FUNCTION_LOONGARCH_RE),
|
||||
'loongarch64': (scrub_asm_loongarch, ASM_FUNCTION_LOONGARCH_RE)
|
||||
}
|
||||
handler = None
|
||||
best_prefix = ''
|
||||
|
|
|
|||
Loading…
Reference in New Issue