forked from OSchip/llvm-project
Add definitions for function headers from MRegisterInfo.h:
Some functions are in X86RegisterInfo.cpp, others, because of the data they need, are in X86RegisterClasses.cpp, which also defines some register classes: byte, short, and int. llvm-svn: 4784
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//===- Target/X86/X86RegisterClasses.cpp - Register Classes -------*-C++-*-===//
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//
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// This file describes the X86 Register Classes which describe registers.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/MRegisterInfo.h"
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#include "X86RegisterInfo.h"
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#include "llvm/Type.h"
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enum {
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#define R(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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namespace {
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static const unsigned X86ByteRegisterClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R8(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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class X86ByteRegisterClass : public TargetRegisterClass {
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protected:
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public:
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X86ByteRegisterClass() {}
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unsigned getNumRegs() const {
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return sizeof(X86ByteRegisterClassRegs)/
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sizeof(X86ByteRegisterClassRegs[0]);
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}
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unsigned getRegister(unsigned idx) const {
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assert(idx < getNumRegs() && "Index out of bounds!");
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return X86ByteRegisterClassRegs[idx];
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}
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unsigned getDataSize() const { return 1; }
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} X86ByteRegisterClassInstance;
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//
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//
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//
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static const unsigned X86ShortRegisterClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R16(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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class X86ShortRegisterClass : public TargetRegisterClass {
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protected:
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public:
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X86ShortRegisterClass() {}
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unsigned getNumRegs() const {
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return sizeof(X86ShortRegisterClassRegs)/
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sizeof(X86ShortRegisterClassRegs[0]); }
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unsigned getRegister(unsigned idx) const {
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assert(idx < getNumRegs() && "Index out of bounds!");
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return X86ShortRegisterClassRegs[idx];
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}
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unsigned getDataSize() const { return 2; }
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} X86ShortRegisterClassInstance;
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//
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//
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//
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static const unsigned X86IntRegisterClassRegs[] = {
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#define R(ENUM, NAME, FLAGS, TSFLAGS)
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#define R32(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
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#include "X86RegisterInfo.def"
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};
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class X86IntRegisterClass : public TargetRegisterClass {
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protected:
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public:
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X86IntRegisterClass() {}
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unsigned getNumRegs() const {
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return sizeof(X86IntRegisterClassRegs)/
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sizeof(X86IntRegisterClassRegs[0]); }
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unsigned getRegister(unsigned idx) const {
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assert(idx < getNumRegs() && "Index out of bounds!");
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return X86IntRegisterClassRegs[idx];
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}
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unsigned getDataSize() const { return 4; }
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} X86IntRegisterClassInstance;
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static const TargetRegisterClass *X86RegClasses[] = {
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&X86ByteRegisterClassInstance,
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&X86ShortRegisterClassInstance,
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&X86IntRegisterClassInstance
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};
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const TargetRegisterClass* X86RegisterInfo::getRegClassForType(const Type* Ty)
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const
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{
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switch (Ty->getPrimitiveID()) {
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case Type::SByteTyID:
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case Type::UByteTyID: return &X86ByteRegisterClassInstance;
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case Type::ShortTyID:
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case Type::UShortTyID: return &X86ShortRegisterClassInstance;
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case Type::IntTyID:
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case Type::UIntTyID:
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case Type::PointerTyID: return &X86IntRegisterClassInstance;
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case Type::LongTyID: /* None of these are handled yet! */
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case Type::ULongTyID:
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case Type::FloatTyID:
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case Type::DoubleTyID:
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default:
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assert(0 && "Invalid type to getClass!");
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return 0; // not reached
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}
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}
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}
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MRegisterInfo::const_iterator X86RegisterInfo::const_regclass_begin() const {
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return X86RegClasses[0];
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}
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unsigned X86RegisterInfo::getNumRegClasses() const {
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return sizeof(X86RegClasses)/sizeof(X86RegClasses[0]);
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}
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MRegisterInfo::const_iterator X86RegisterInfo::const_regclass_end() const {
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return (X86RegClasses[0]+getNumRegClasses());
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}
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@ -4,7 +4,11 @@
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//
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//===----------------------------------------------------------------------===//
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#include "X86.h"
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#include "X86RegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Type.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
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// descriptors
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@ -17,3 +21,25 @@ static const MRegisterDesc X86Regs[] = {
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X86RegisterInfo::X86RegisterInfo()
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: MRegisterInfo(X86Regs, sizeof(X86Regs)/sizeof(X86Regs[0])) {
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}
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void X86RegisterInfo::copyReg2PCRel(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned SrcReg, unsigned ImmOffset,
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unsigned dataSize) const
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{
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MachineInstrBuilder MI = BuildMI(X86::MOVmr32, 2)
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.addPCDisp(ConstantUInt::get(Type::UIntTy, ImmOffset)).addReg(SrcReg);
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MBB->insert(MBBI, &*MI);
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}
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void X86RegisterInfo::copyPCRel2Reg(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned ImmOffset, unsigned DestReg,
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unsigned dataSize) const
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{
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MachineInstrBuilder MI = BuildMI(X86::MOVrm32, 2)
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.addReg(DestReg).addPCDisp(ConstantUInt::get(Type::UIntTy, ImmOffset));
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MBB->insert(MBBI, &*MI);
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}
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@ -9,9 +9,33 @@
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#include "llvm/Target/MRegisterInfo.h"
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class Type;
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struct X86RegisterInfo : public MRegisterInfo {
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X86RegisterInfo();
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MRegisterInfo::const_iterator const_regclass_begin() const;
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MRegisterInfo::const_iterator const_regclass_end() const;
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void copyReg2PCRel(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned SrcReg, unsigned ImmOffset,
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unsigned dataSize) const;
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void copyPCRel2Reg(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned ImmOffset, unsigned DestReg,
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unsigned dataSize) const;
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/// Returns register class appropriate for input SSA register
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///
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const TargetRegisterClass *getClassForReg(unsigned Reg) const;
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const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
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unsigned getNumRegClasses() const;
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};
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#endif
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