Add definitions for function headers from MRegisterInfo.h:

Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.

llvm-svn: 4784
This commit is contained in:
Misha Brukman 2002-11-20 18:59:43 +00:00
parent 6e5d493e0f
commit 53d2de923a
3 changed files with 188 additions and 0 deletions

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@ -0,0 +1,138 @@
//===- Target/X86/X86RegisterClasses.cpp - Register Classes -------*-C++-*-===//
//
// This file describes the X86 Register Classes which describe registers.
//
//===----------------------------------------------------------------------===//
#include "llvm/Target/MRegisterInfo.h"
#include "X86RegisterInfo.h"
#include "llvm/Type.h"
enum {
#define R(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
#include "X86RegisterInfo.def"
};
namespace {
static const unsigned X86ByteRegisterClassRegs[] = {
#define R(ENUM, NAME, FLAGS, TSFLAGS)
#define R8(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
#include "X86RegisterInfo.def"
};
class X86ByteRegisterClass : public TargetRegisterClass {
protected:
public:
X86ByteRegisterClass() {}
unsigned getNumRegs() const {
return sizeof(X86ByteRegisterClassRegs)/
sizeof(X86ByteRegisterClassRegs[0]);
}
unsigned getRegister(unsigned idx) const {
assert(idx < getNumRegs() && "Index out of bounds!");
return X86ByteRegisterClassRegs[idx];
}
unsigned getDataSize() const { return 1; }
} X86ByteRegisterClassInstance;
//
//
//
static const unsigned X86ShortRegisterClassRegs[] = {
#define R(ENUM, NAME, FLAGS, TSFLAGS)
#define R16(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
#include "X86RegisterInfo.def"
};
class X86ShortRegisterClass : public TargetRegisterClass {
protected:
public:
X86ShortRegisterClass() {}
unsigned getNumRegs() const {
return sizeof(X86ShortRegisterClassRegs)/
sizeof(X86ShortRegisterClassRegs[0]); }
unsigned getRegister(unsigned idx) const {
assert(idx < getNumRegs() && "Index out of bounds!");
return X86ShortRegisterClassRegs[idx];
}
unsigned getDataSize() const { return 2; }
} X86ShortRegisterClassInstance;
//
//
//
static const unsigned X86IntRegisterClassRegs[] = {
#define R(ENUM, NAME, FLAGS, TSFLAGS)
#define R32(ENUM, NAME, FLAGS, TSFLAGS) ENUM,
#include "X86RegisterInfo.def"
};
class X86IntRegisterClass : public TargetRegisterClass {
protected:
public:
X86IntRegisterClass() {}
unsigned getNumRegs() const {
return sizeof(X86IntRegisterClassRegs)/
sizeof(X86IntRegisterClassRegs[0]); }
unsigned getRegister(unsigned idx) const {
assert(idx < getNumRegs() && "Index out of bounds!");
return X86IntRegisterClassRegs[idx];
}
unsigned getDataSize() const { return 4; }
} X86IntRegisterClassInstance;
static const TargetRegisterClass *X86RegClasses[] = {
&X86ByteRegisterClassInstance,
&X86ShortRegisterClassInstance,
&X86IntRegisterClassInstance
};
const TargetRegisterClass* X86RegisterInfo::getRegClassForType(const Type* Ty)
const
{
switch (Ty->getPrimitiveID()) {
case Type::SByteTyID:
case Type::UByteTyID: return &X86ByteRegisterClassInstance;
case Type::ShortTyID:
case Type::UShortTyID: return &X86ShortRegisterClassInstance;
case Type::IntTyID:
case Type::UIntTyID:
case Type::PointerTyID: return &X86IntRegisterClassInstance;
case Type::LongTyID: /* None of these are handled yet! */
case Type::ULongTyID:
case Type::FloatTyID:
case Type::DoubleTyID:
default:
assert(0 && "Invalid type to getClass!");
return 0; // not reached
}
}
}
MRegisterInfo::const_iterator X86RegisterInfo::const_regclass_begin() const {
return X86RegClasses[0];
}
unsigned X86RegisterInfo::getNumRegClasses() const {
return sizeof(X86RegClasses)/sizeof(X86RegClasses[0]);
}
MRegisterInfo::const_iterator X86RegisterInfo::const_regclass_end() const {
return (X86RegClasses[0]+getNumRegClasses());
}

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@ -4,7 +4,11 @@
//
//===----------------------------------------------------------------------===//
#include "X86.h"
#include "X86RegisterInfo.h"
#include "llvm/Constants.h"
#include "llvm/Type.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
// descriptors
@ -17,3 +21,25 @@ static const MRegisterDesc X86Regs[] = {
X86RegisterInfo::X86RegisterInfo()
: MRegisterInfo(X86Regs, sizeof(X86Regs)/sizeof(X86Regs[0])) {
}
void X86RegisterInfo::copyReg2PCRel(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &MBBI,
unsigned SrcReg, unsigned ImmOffset,
unsigned dataSize) const
{
MachineInstrBuilder MI = BuildMI(X86::MOVmr32, 2)
.addPCDisp(ConstantUInt::get(Type::UIntTy, ImmOffset)).addReg(SrcReg);
MBB->insert(MBBI, &*MI);
}
void X86RegisterInfo::copyPCRel2Reg(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &MBBI,
unsigned ImmOffset, unsigned DestReg,
unsigned dataSize) const
{
MachineInstrBuilder MI = BuildMI(X86::MOVrm32, 2)
.addReg(DestReg).addPCDisp(ConstantUInt::get(Type::UIntTy, ImmOffset));
MBB->insert(MBBI, &*MI);
}

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@ -9,9 +9,33 @@
#include "llvm/Target/MRegisterInfo.h"
class Type;
struct X86RegisterInfo : public MRegisterInfo {
X86RegisterInfo();
MRegisterInfo::const_iterator const_regclass_begin() const;
MRegisterInfo::const_iterator const_regclass_end() const;
void copyReg2PCRel(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &MBBI,
unsigned SrcReg, unsigned ImmOffset,
unsigned dataSize) const;
void copyPCRel2Reg(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &MBBI,
unsigned ImmOffset, unsigned DestReg,
unsigned dataSize) const;
/// Returns register class appropriate for input SSA register
///
const TargetRegisterClass *getClassForReg(unsigned Reg) const;
const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
unsigned getNumRegClasses() const;
};
#endif