Fix thumbv5e frame lowering assertion failure.

It is possible that frame pointer is not found in the
callee saved info, thus FramePtrSpillFI may be incorrect
if we don't check the result of hasFP(MF).

Besides, if we enable the stack coloring algorithm, there
will be an assertion to ensure the slot is live.  But in
the test case, %var1 is not live in the prologue of the
function, and we will get the assertion failure.

Note: There is similar code in ARMFrameLowering.cpp.
llvm-svn: 175616
This commit is contained in:
Logan Chien 2013-02-20 12:21:33 +00:00
parent ec1d286111
commit 53c18d8ac7
2 changed files with 35 additions and 3 deletions

View File

@ -124,14 +124,17 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
bool HasFP = hasFP(MF);
if (HasFP)
AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) +
NumBytes);
AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
NumBytes = DPRCSOffset;
// Adjust FP so it point to the stack slot that contains the previous FP.
if (hasFP(MF)) {
if (HasFP) {
AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
.addFrameIndex(FramePtrSpillFI).addImm(0)
.setMIFlags(MachineInstr::FrameSetup));
@ -146,7 +149,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
MachineInstr::FrameSetup);
if (STI.isTargetELF() && hasFP(MF))
if (STI.isTargetELF() && HasFP)
MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
AFI->getFramePtrSpillOffset());

View File

@ -0,0 +1,29 @@
; RUN: llc < %s -march=thumb -mcpu=arm1022e
%iterator = type { i8**, i8**, i8**, i8*** }
%insert_iterator = type { %deque*, %iterator }
%deque = type { %iterator, %iterator, i8***, i32 }
define i32 @test_thumbv5e_fp_elim() nounwind optsize {
entry:
%var1 = alloca %iterator, align 4
%var2 = alloca %insert_iterator, align 4
%var3 = alloca %deque, align 4
%0 = bitcast %deque* %var3 to i8*
%1 = bitcast %iterator* %var1 to i8*
call void @llvm.lifetime.start(i64 16, i8* %1) nounwind
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %0, i32 16, i32 4, i1 false)
call void @llvm.lifetime.end(i64 16, i8* %1) nounwind
%2 = bitcast %insert_iterator* %var2 to i8*
call void @llvm.lifetime.start(i64 20, i8* %2) nounwind
ret i32 0
}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind