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setOperand should not zap the operand list or add implicit operands to an 

instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll

llvm-svn: 31876
This commit is contained in:
Chris Lattner 2006-11-20 17:57:22 +00:00
parent 2ae1230764
commit 539df43e4b
2 changed files with 1 additions and 40 deletions
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2
llvm/include/llvm/CodeGen/MachineInstr.h
View File

@ -490,7 +490,7 @@ public:
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
void setOpcode(unsigned Op);
void setOpcode(unsigned Op) { Opcode = Op; }
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.

39
llvm/lib/CodeGen/MachineInstr.cpp
View File

@ -180,45 +180,6 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
}
}
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
void MachineInstr::setOpcode(unsigned Op) {
Operands.erase(Operands.begin(), Operands.begin()+NumImplicitOps);
NumImplicitOps = 0;
Opcode = Op;
if (!getParent())
return;
const TargetInstrDescriptor &TID = getParent()->getParent()->
getTarget().getInstrInfo()->get(Op);
if (TID.ImplicitDefs)
for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) {
MachineOperand Op;
Op.opType = MachineOperand::MO_Register;
Op.IsDef = true;
Op.IsImp = true;
Op.IsKill = false;
Op.IsDead = false;
Op.contents.RegNo = *ImpDefs;
Op.offset = 0;
Operands.insert(Operands.begin()+NumImplicitOps, Op);
NumImplicitOps++;
}
if (TID.ImplicitUses)
for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) {
MachineOperand Op;
Op.opType = MachineOperand::MO_Register;
Op.IsDef = false;
Op.IsImp = true;
Op.IsKill = false;
Op.IsDead = false;
Op.contents.RegNo = *ImpUses;
Op.offset = 0;
Operands.insert(Operands.begin()+NumImplicitOps, Op);
NumImplicitOps++;
}
}
void MachineInstr::dump() const {
std::cerr << " " << *this;
}