forked from OSchip/llvm-project
[mlir][spirv] Lower sexti -> SConvert
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@ -1182,6 +1182,7 @@ void populateStandardToSPIRVPatterns(MLIRContext *context,
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TypeCastingOpPattern<IndexCastOp, spirv::SConvertOp>,
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TypeCastingOpPattern<SIToFPOp, spirv::ConvertSToFOp>,
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TypeCastingOpPattern<UIToFPOp, spirv::ConvertUToFOp>,
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TypeCastingOpPattern<SignExtendIOp, spirv::SConvertOp>,
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TypeCastingOpPattern<ZeroExtendIOp, spirv::UConvertOp>,
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TypeCastingOpPattern<TruncateIOp, spirv::SConvertOp>,
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TypeCastingOpPattern<FPToSIOp, spirv::ConvertFToSOp>,
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@ -675,6 +675,20 @@ spv.func @uitofp_vec_i1_f64(%arg0: vector<4xi1>) -> vector<4xf64> "None" {
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spv.ReturnValue %2 : vector<4xf64>
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}
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// CHECK-LABEL: @sexti1
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func @sexti1(%arg0: i16) -> i64 {
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// CHECK: spv.SConvert %{{.*}} : i16 to i64
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%0 = std.sexti %arg0 : i16 to i64
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return %0 : i64
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}
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// CHECK-LABEL: @sexti2
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func @sexti2(%arg0 : i32) -> i64 {
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// CHECK: spv.SConvert %{{.*}} : i32 to i64
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%0 = std.sexti %arg0 : i32 to i64
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return %0 : i64
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}
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// CHECK-LABEL: @zexti1
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func @zexti1(%arg0: i16) -> i64 {
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// CHECK: spv.UConvert %{{.*}} : i16 to i64
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