forked from OSchip/llvm-project
[DAGCombiner] clean up getStoreMergeCandidates(); NFC
1. Move bailouts and local var declarations. 2. Convert if-chain to switch on StoreSource with unreachable default.
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@ -16100,23 +16100,19 @@ void DAGCombiner::getStoreMergeCandidates(
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StoreSDNode *St, SmallVectorImpl<MemOpLink> &StoreNodes,
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SDNode *&RootNode) {
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// This holds the base pointer, index, and the offset in bytes from the base
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// pointer.
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// pointer. We must have a base and an offset. Do not handle stores to undef
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// base pointers.
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BaseIndexOffset BasePtr = BaseIndexOffset::match(St, DAG);
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EVT MemVT = St->getMemoryVT();
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if (!BasePtr.getBase().getNode() || BasePtr.getBase().isUndef())
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return;
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SDValue Val = peekThroughBitcasts(St->getValue());
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// We must have a base and an offset.
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if (!BasePtr.getBase().getNode())
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return;
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// Do not handle stores to undef base pointers.
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if (BasePtr.getBase().isUndef())
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return;
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StoreSource StoreSrc = getStoreSource(Val);
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assert(StoreSrc != StoreSource::Unknown && "Expected known source for store");
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BaseIndexOffset LBasePtr;
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// Match on loadbaseptr if relevant.
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EVT MemVT = St->getMemoryVT();
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BaseIndexOffset LBasePtr;
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EVT LoadVT;
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if (StoreSrc == StoreSource::Load) {
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auto *Ld = cast<LoadSDNode>(Val);
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@ -16146,37 +16142,38 @@ void DAGCombiner::getStoreMergeCandidates(
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// Allow merging constants of different types as integers.
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bool NoTypeMatch = (MemVT.isInteger()) ? !MemVT.bitsEq(Other->getMemoryVT())
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: Other->getMemoryVT() != MemVT;
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if (StoreSrc == StoreSource::Load) {
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switch (StoreSrc) {
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case StoreSource::Load: {
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if (NoTypeMatch)
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return false;
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// The Load's Base Ptr must also match
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if (LoadSDNode *OtherLd = dyn_cast<LoadSDNode>(OtherBC)) {
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BaseIndexOffset LPtr = BaseIndexOffset::match(OtherLd, DAG);
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if (LoadVT != OtherLd->getMemoryVT())
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return false;
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// Loads must only have one use.
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if (!OtherLd->hasNUsesOfValue(1, 0))
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return false;
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// The memory operands must not be volatile/indexed/atomic.
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// TODO: May be able to relax for unordered atomics (see D66309)
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if (!OtherLd->isSimple() ||
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OtherLd->isIndexed())
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return false;
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// Don't mix temporal loads with non-temporal loads.
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if (cast<LoadSDNode>(Val)->isNonTemporal() != OtherLd->isNonTemporal())
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return false;
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if (!(LBasePtr.equalBaseIndex(LPtr, DAG)))
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return false;
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} else
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// The Load's Base Ptr must also match.
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auto *OtherLd = dyn_cast<LoadSDNode>(OtherBC);
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if (!OtherLd)
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return false;
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BaseIndexOffset LPtr = BaseIndexOffset::match(OtherLd, DAG);
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if (LoadVT != OtherLd->getMemoryVT())
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return false;
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// Loads must only have one use.
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if (!OtherLd->hasNUsesOfValue(1, 0))
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return false;
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// The memory operands must not be volatile/indexed/atomic.
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// TODO: May be able to relax for unordered atomics (see D66309)
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if (!OtherLd->isSimple() || OtherLd->isIndexed())
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return false;
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// Don't mix temporal loads with non-temporal loads.
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if (cast<LoadSDNode>(Val)->isNonTemporal() != OtherLd->isNonTemporal())
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return false;
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if (!(LBasePtr.equalBaseIndex(LPtr, DAG)))
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return false;
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break;
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}
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if (StoreSrc == StoreSource::Constant) {
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case StoreSource::Constant:
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if (NoTypeMatch)
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return false;
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if (!(isa<ConstantSDNode>(OtherBC) || isa<ConstantFPSDNode>(OtherBC)))
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return false;
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}
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if (StoreSrc == StoreSource::Extract) {
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break;
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case StoreSource::Extract:
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// Do not merge truncated stores here.
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if (Other->isTruncatingStore())
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return false;
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@ -16185,6 +16182,9 @@ void DAGCombiner::getStoreMergeCandidates(
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if (OtherBC.getOpcode() != ISD::EXTRACT_VECTOR_ELT &&
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OtherBC.getOpcode() != ISD::EXTRACT_SUBVECTOR)
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return false;
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break;
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default:
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llvm_unreachable("Unhandled store source for merging");
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}
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Ptr = BaseIndexOffset::match(Other, DAG);
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return (BasePtr.equalBaseIndex(Ptr, DAG, Offset));
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