forked from OSchip/llvm-project
AMDGPU: enable 128-bit for local addr space under an option
Author: Samuel Pitoiset ds_read_b128 and ds_write_b128 have been recently enabled under the amdgpu-ds128 option because the performance benefit is unclear. Though, using 128-bit loads/stores for the local address space appears to introduce regressions in tessellation shaders. Not sure what is broken, but as ds_read_b128/ds_write_b128 are not enabled by default, just introduce a global option and enable 128-bit only if requested (until it's fixed/used correctly). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 llvm-svn: 329591
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@ -426,6 +426,12 @@ def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
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"Enable SI Machine Scheduler"
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"Enable SI Machine Scheduler"
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>;
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>;
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def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
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"EnableDS128",
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"true",
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"Use ds_{read|write}_b128"
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>;
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// Unless +-flat-for-global is specified, turn on FlatForGlobal for
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// Unless +-flat-for-global is specified, turn on FlatForGlobal for
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// all OS-es on VI and newer hardware to avoid assertion failures due
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// all OS-es on VI and newer hardware to avoid assertion failures due
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// to missing ADDR64 variants of MUBUF instructions.
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// to missing ADDR64 variants of MUBUF instructions.
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@ -132,6 +132,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
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EnableLoadStoreOpt(false),
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EnableLoadStoreOpt(false),
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EnableUnsafeDSOffsetFolding(false),
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EnableUnsafeDSOffsetFolding(false),
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EnableSIScheduler(false),
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EnableSIScheduler(false),
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EnableDS128(false),
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DumpCode(false),
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DumpCode(false),
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FP64(false),
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FP64(false),
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@ -133,6 +133,7 @@ protected:
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bool EnableLoadStoreOpt;
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bool EnableLoadStoreOpt;
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bool EnableUnsafeDSOffsetFolding;
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bool EnableUnsafeDSOffsetFolding;
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bool EnableSIScheduler;
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bool EnableSIScheduler;
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bool EnableDS128;
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bool DumpCode;
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bool DumpCode;
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// Subtarget statically properties set by tablegen
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// Subtarget statically properties set by tablegen
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@ -412,8 +413,8 @@ public:
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/// \returns If target supports ds_read/write_b128 and user enables generation
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/// \returns If target supports ds_read/write_b128 and user enables generation
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/// of ds_read/write_b128.
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/// of ds_read/write_b128.
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bool useDS128(bool UserEnable) const {
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bool useDS128() const {
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return CIInsts && UserEnable;
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return CIInsts && EnableDS128;
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}
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}
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/// \returns If MUBUF instructions always perform range checking, even for
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/// \returns If MUBUF instructions always perform range checking, even for
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@ -265,11 +265,13 @@ unsigned AMDGPUTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const {
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return 512;
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return 512;
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}
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}
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if (AddrSpace == AS.FLAT_ADDRESS ||
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if (AddrSpace == AS.FLAT_ADDRESS)
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AddrSpace == AS.LOCAL_ADDRESS ||
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AddrSpace == AS.REGION_ADDRESS)
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return 128;
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return 128;
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if (AddrSpace == AS.LOCAL_ADDRESS ||
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AddrSpace == AS.REGION_ADDRESS)
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return ST->useDS128() ? 128 : 64;
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if (AddrSpace == AS.PRIVATE_ADDRESS)
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if (AddrSpace == AS.PRIVATE_ADDRESS)
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return 8 * ST->getMaxPrivateElementSize();
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return 8 * ST->getMaxPrivateElementSize();
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@ -94,11 +94,6 @@ static cl::opt<bool> EnableVGPRIndexMode(
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cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),
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cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),
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cl::init(false));
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cl::init(false));
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static cl::opt<bool> EnableDS128(
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"amdgpu-ds128",
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cl::desc("Use DS_read/write_b128"),
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cl::init(false));
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static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(
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static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(
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"amdgpu-frame-index-zero-bits",
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"amdgpu-frame-index-zero-bits",
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cl::desc("High bits of frame index assumed to be zero"),
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cl::desc("High bits of frame index assumed to be zero"),
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@ -5300,7 +5295,7 @@ SDValue SITargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
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}
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}
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} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
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} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
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// Use ds_read_b128 if possible.
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// Use ds_read_b128 if possible.
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if (Subtarget->useDS128(EnableDS128) && Load->getAlignment() >= 16 &&
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if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&
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MemVT.getStoreSize() == 16)
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MemVT.getStoreSize() == 16)
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return SDValue();
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return SDValue();
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@ -5703,7 +5698,7 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
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}
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}
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} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
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} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
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// Use ds_write_b128 if possible.
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// Use ds_write_b128 if possible.
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if (Subtarget->useDS128(EnableDS128) && Store->getAlignment() >= 16 &&
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if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&
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VT.getStoreSize() == 16)
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VT.getStoreSize() == 16)
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return SDValue();
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return SDValue();
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@ -3,9 +3,9 @@
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; Testing for ds_read/write_128
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; Testing for ds_read/write_128
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; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}load_f32_local:
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; FUNC-LABEL: {{^}}load_f32_local:
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; SICIVI: s_mov_b32 m0
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; SICIVI: s_mov_b32 m0
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@ -5,8 +5,8 @@
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; Testing for ds_read_b128
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; Testing for ds_read_b128
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}local_load_f64:
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; FUNC-LABEL: {{^}}local_load_f64:
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; SICIV: s_mov_b32 m0
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; SICIV: s_mov_b32 m0
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@ -4,8 +4,8 @@
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; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; Testing for ds_read/write_b128
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; Testing for ds_read/write_b128
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; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}local_load_i16:
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; FUNC-LABEL: {{^}}local_load_i16:
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; GFX9-NOT: m0
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; GFX9-NOT: m0
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@ -4,9 +4,9 @@
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; Testing for ds_read/write_128
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; Testing for ds_read/write_128
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; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}local_load_i32:
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; FUNC-LABEL: {{^}}local_load_i32:
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; GCN-NOT: s_wqm_b64
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; GCN-NOT: s_wqm_b64
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@ -5,8 +5,8 @@
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
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; Testing for ds_read/write_b128
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; Testing for ds_read/write_b128
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}local_load_i64:
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; FUNC-LABEL: {{^}}local_load_i64:
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; SICIVI: s_mov_b32 m0
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; SICIVI: s_mov_b32 m0
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@ -4,8 +4,8 @@
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; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; Testing for ds_read/write_b128
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; Testing for ds_read/write_b128
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; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
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; FUNC-LABEL: {{^}}local_load_i8:
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; FUNC-LABEL: {{^}}local_load_i8:
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; GCN-NOT: s_wqm_b64
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; GCN-NOT: s_wqm_b64
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