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Add a limit to the heuristic that register allocates instructions in local order. 

This handles pathological cases in which we see 2x increase in spill
code for large blocks (~50k instructions). I don't have a unit test
for this behavior.

Fixes rdar://16072279.

llvm-svn: 202304
This commit is contained in:
Andrew Trick 2014-02-26 22:07:26 +00:00
parent 0140ce483f
commit 52a00936b4
2 changed files with 9 additions and 3 deletions
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10
llvm/lib/CodeGen/RegAllocGreedy.cpp
View File

@ -454,12 +454,18 @@ void RAGreedy::enqueue(PQueue &CurQueue, LiveInterval *LI) {
// everything else has been allocated.
Prio = Size;
} else {
if (ExtraRegInfo[Reg].Stage == RS_Assign && !LI->empty() &&
// Giant live ranges fall back to the global assignment heuristic, which
// prevents excessive spilling in pathological cases.
bool ReverseLocal = TRI->reverseLocalAssignment();
bool ForceGlobal = !ReverseLocal &&
(Size / SlotIndex::InstrDist) > (2 * MRI->getRegClass(Reg)->getNumRegs());
if (ExtraRegInfo[Reg].Stage == RS_Assign && !ForceGlobal && !LI->empty() &&
LIS->intervalIsInOneMBB(*LI)) {
// Allocate original local ranges in linear instruction order. Since they
// are singly defined, this produces optimal coloring in the absence of
// global interference and other constraints.
if (!TRI->reverseLocalAssignment())
if (!ReverseLocal)
Prio = LI->beginIndex().getInstrDistance(Indexes->getLastIndex());
else {
// Allocating bottom up may allow many short LRGs to be assigned first

2
llvm/test/CodeGen/X86/misched-matmul.ll
View File

@ -10,7 +10,7 @@
; more complex cases.
;
; CHECK: @wrap_mul4
; CHECK: 23 regalloc - Number of spills inserted
; CHECK: 22 regalloc - Number of spills inserted
define void @wrap_mul4(double* nocapture %Out, [4 x double]* nocapture %A, [4 x double]* nocapture %B) #0 {
entry: