forked from OSchip/llvm-project
[AMDGPU][Codegen] Unsupported image sample texture map instructions
Disables image_sample_*_g16 instructions on architectures lacking g16 support. This patch fixes the issue 54672. Differential Revision: https://reviews.llvm.org/D123461
This commit is contained in:
Anshil Gandhi
parent
d9211be13d
commit
528aa09010
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@ -1000,8 +1000,6 @@ let OtherPredicates = [HasExtendedImageInsts] in {
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defm IMAGE_SAMPLE_CL : MIMG_Sampler_WQM <mimgopc<0x21>, AMDGPUSample_cl>;
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defm IMAGE_SAMPLE_D : MIMG_Sampler <mimgopc<0x22>, AMDGPUSample_d>;
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defm IMAGE_SAMPLE_D_CL : MIMG_Sampler <mimgopc<0x23>, AMDGPUSample_d_cl>;
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defm IMAGE_SAMPLE_D_G16 : MIMG_Sampler <mimgopc<0xa2>, AMDGPUSample_d, 0, 1>;
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defm IMAGE_SAMPLE_D_CL_G16 : MIMG_Sampler <mimgopc<0xa3>, AMDGPUSample_d_cl, 0, 1>;
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defm IMAGE_SAMPLE_L : MIMG_Sampler <mimgopc<0x24>, AMDGPUSample_l>;
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defm IMAGE_SAMPLE_B : MIMG_Sampler_WQM <mimgopc<0x25>, AMDGPUSample_b>;
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defm IMAGE_SAMPLE_B_CL : MIMG_Sampler_WQM <mimgopc<0x26>, AMDGPUSample_b_cl>;
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@ -1010,8 +1008,6 @@ defm IMAGE_SAMPLE_C : MIMG_Sampler_WQM <mimgopc<0x28>, AMDGPUSample_
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defm IMAGE_SAMPLE_C_CL : MIMG_Sampler_WQM <mimgopc<0x29>, AMDGPUSample_c_cl>;
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defm IMAGE_SAMPLE_C_D : MIMG_Sampler <mimgopc<0x2a>, AMDGPUSample_c_d>;
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defm IMAGE_SAMPLE_C_D_CL : MIMG_Sampler <mimgopc<0x2b>, AMDGPUSample_c_d_cl>;
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defm IMAGE_SAMPLE_C_D_G16 : MIMG_Sampler <mimgopc<0xaa>, AMDGPUSample_c_d, 0, 1>;
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defm IMAGE_SAMPLE_C_D_CL_G16 : MIMG_Sampler <mimgopc<0xab>, AMDGPUSample_c_d_cl, 0, 1>;
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defm IMAGE_SAMPLE_C_L : MIMG_Sampler <mimgopc<0x2c>, AMDGPUSample_c_l>;
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defm IMAGE_SAMPLE_C_B : MIMG_Sampler_WQM <mimgopc<0x2d>, AMDGPUSample_c_b>;
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defm IMAGE_SAMPLE_C_B_CL : MIMG_Sampler_WQM <mimgopc<0x2e>, AMDGPUSample_c_b_cl>;
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@ -1020,8 +1016,6 @@ defm IMAGE_SAMPLE_O : MIMG_Sampler_WQM <mimgopc<0x30>, AMDGPUSample_
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defm IMAGE_SAMPLE_CL_O : MIMG_Sampler_WQM <mimgopc<0x31>, AMDGPUSample_cl_o>;
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defm IMAGE_SAMPLE_D_O : MIMG_Sampler <mimgopc<0x32>, AMDGPUSample_d_o>;
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defm IMAGE_SAMPLE_D_CL_O : MIMG_Sampler <mimgopc<0x33>, AMDGPUSample_d_cl_o>;
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defm IMAGE_SAMPLE_D_O_G16 : MIMG_Sampler <mimgopc<0xb2>, AMDGPUSample_d_o, 0, 1>;
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defm IMAGE_SAMPLE_D_CL_O_G16 : MIMG_Sampler <mimgopc<0xb3>, AMDGPUSample_d_cl_o, 0, 1>;
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defm IMAGE_SAMPLE_L_O : MIMG_Sampler <mimgopc<0x34>, AMDGPUSample_l_o>;
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defm IMAGE_SAMPLE_B_O : MIMG_Sampler_WQM <mimgopc<0x35>, AMDGPUSample_b_o>;
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defm IMAGE_SAMPLE_B_CL_O : MIMG_Sampler_WQM <mimgopc<0x36>, AMDGPUSample_b_cl_o>;
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@ -1030,8 +1024,6 @@ defm IMAGE_SAMPLE_C_O : MIMG_Sampler_WQM <mimgopc<0x38>, AMDGPUSample_
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defm IMAGE_SAMPLE_C_CL_O : MIMG_Sampler_WQM <mimgopc<0x39>, AMDGPUSample_c_cl_o>;
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defm IMAGE_SAMPLE_C_D_O : MIMG_Sampler <mimgopc<0x3a>, AMDGPUSample_c_d_o>;
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defm IMAGE_SAMPLE_C_D_CL_O : MIMG_Sampler <mimgopc<0x3b>, AMDGPUSample_c_d_cl_o>;
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defm IMAGE_SAMPLE_C_D_O_G16 : MIMG_Sampler <mimgopc<0xba>, AMDGPUSample_c_d_o, 0, 1>;
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defm IMAGE_SAMPLE_C_D_CL_O_G16 : MIMG_Sampler <mimgopc<0xbb>, AMDGPUSample_c_d_cl_o, 0, 1>;
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defm IMAGE_SAMPLE_C_L_O : MIMG_Sampler <mimgopc<0x3c>, AMDGPUSample_c_l_o>;
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defm IMAGE_SAMPLE_C_B_CL_O : MIMG_Sampler_WQM <mimgopc<0x3e>, AMDGPUSample_c_b_cl_o>;
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defm IMAGE_SAMPLE_C_B_O : MIMG_Sampler_WQM <mimgopc<0x3d>, AMDGPUSample_c_b_o>;
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@ -1072,6 +1064,17 @@ defm IMAGE_SAMPLE_CD_O : MIMG_Sampler <mimgopc<0x6c>, AMDGPUSample_cd_o
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defm IMAGE_SAMPLE_CD_CL_O : MIMG_Sampler <mimgopc<0x6d>, AMDGPUSample_cd_cl_o>;
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defm IMAGE_SAMPLE_C_CD_O : MIMG_Sampler <mimgopc<0x6e>, AMDGPUSample_c_cd_o>;
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defm IMAGE_SAMPLE_C_CD_CL_O : MIMG_Sampler <mimgopc<0x6f>, AMDGPUSample_c_cd_cl_o>;
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} // End OtherPredicates = [HasExtendedImageInsts]
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let OtherPredicates = [HasExtendedImageInsts,HasG16] in {
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defm IMAGE_SAMPLE_D_G16 : MIMG_Sampler <mimgopc<0xa2>, AMDGPUSample_d, 0, 1>;
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defm IMAGE_SAMPLE_D_CL_G16 : MIMG_Sampler <mimgopc<0xa3>, AMDGPUSample_d_cl, 0, 1>;
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defm IMAGE_SAMPLE_C_D_G16 : MIMG_Sampler <mimgopc<0xaa>, AMDGPUSample_c_d, 0, 1>;
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defm IMAGE_SAMPLE_C_D_CL_G16 : MIMG_Sampler <mimgopc<0xab>, AMDGPUSample_c_d_cl, 0, 1>;
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defm IMAGE_SAMPLE_D_O_G16 : MIMG_Sampler <mimgopc<0xb2>, AMDGPUSample_d_o, 0, 1>;
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defm IMAGE_SAMPLE_D_CL_O_G16 : MIMG_Sampler <mimgopc<0xb3>, AMDGPUSample_d_cl_o, 0, 1>;
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defm IMAGE_SAMPLE_C_D_O_G16 : MIMG_Sampler <mimgopc<0xba>, AMDGPUSample_c_d_o, 0, 1>;
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defm IMAGE_SAMPLE_C_D_CL_O_G16 : MIMG_Sampler <mimgopc<0xbb>, AMDGPUSample_c_d_cl_o, 0, 1>;
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defm IMAGE_SAMPLE_CD_G16 : MIMG_Sampler <mimgopc<0xe8>, AMDGPUSample_cd, 0, 1>;
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defm IMAGE_SAMPLE_CD_CL_G16 : MIMG_Sampler <mimgopc<0xe9>, AMDGPUSample_cd_cl, 0, 1>;
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defm IMAGE_SAMPLE_C_CD_G16 : MIMG_Sampler <mimgopc<0xea>, AMDGPUSample_c_cd, 0, 1>;
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@ -1080,7 +1083,8 @@ defm IMAGE_SAMPLE_CD_O_G16 : MIMG_Sampler <mimgopc<0xec>, AMDGPUSample_cd_o
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defm IMAGE_SAMPLE_CD_CL_O_G16 : MIMG_Sampler <mimgopc<0xed>, AMDGPUSample_cd_cl_o, 0, 1>;
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defm IMAGE_SAMPLE_C_CD_O_G16 : MIMG_Sampler <mimgopc<0xee>, AMDGPUSample_c_cd_o, 0, 1>;
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defm IMAGE_SAMPLE_C_CD_CL_O_G16 : MIMG_Sampler <mimgopc<0xef>, AMDGPUSample_c_cd_cl_o, 0, 1>;
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} // End OtherPredicates = [HasExtendedImageInsts]
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} // End OtherPredicates = [HasExtendedImageInsts,HasG16]
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//def IMAGE_RSRC256 : MIMG_NoPattern_RSRC256 <"image_rsrc256", 0x0000007e>;
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//def IMAGE_SAMPLER : MIMG_NoPattern_ <"image_sampler", 0x0000007f>;
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@ -2546,6 +2546,54 @@ v_xor3_b32 v255, v1, v2, v3
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// Unsupported e64 variants.
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//===----------------------------------------------------------------------===//
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image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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v_interp_mov_f32_e64 v255, p10, attr0.x
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// CHECK: error: e64 variant of this instruction is not supported
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@ -4,6 +4,54 @@
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// Unsupported instructions.
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//===----------------------------------------------------------------------===//
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image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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buffer_atomic_add_f32 v255, off, s[8:11], s3 offset:4095
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// CHECK: error: instruction not supported on this GPU
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@ -4,6 +4,54 @@
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// Unsupported instructions.
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//===----------------------------------------------------------------------===//
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image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: instruction not supported on this GPU
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buffer_atomic_add_f32 v255, off, s[8:11], s3 offset:4095
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// CHECK: error: instruction not supported on this GPU
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