Reland "[X86] Support `_Float16` on SSE2 and up"

Enable `COMPILER_RT_HAS_FLOAT16` to solve the lit fail.

This is split from D113107 to address #56204 and https://discourse.llvm.org/t/how-to-build-compiler-rt-for-new-x86-half-float-abi/63366

Reviewed By: zahiraam, rjmccall, bkramer

Differential Revision: https://reviews.llvm.org/D128571
This commit is contained in:
Phoebe Wang 2022-06-27 21:02:57 +08:00
parent 7e86b13c63
commit 527ef8ca98
9 changed files with 51 additions and 7 deletions

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@ -743,7 +743,13 @@ targets pending ABI standardization:
* 64-bit ARM (AArch64)
* AMDGPU
* SPIR
* X86 (Only available under feature AVX512-FP16)
* X86 (see below)
On X86 targets, ``_Float16`` is supported as long as SSE2 is available, which
includes all 64-bit and all recent 32-bit processors. When the target supports
AVX512-FP16, ``_Float16`` arithmetic is performed using that native support.
Otherwise, ``_Float16`` arithmetic is performed by promoting to ``float``,
performing the operation, and then truncating to ``_Float16``.
``_Float16`` will be supported on more targets as they define ABIs for it.

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@ -514,6 +514,9 @@ X86 Support in Clang
- Support ``-mharden-sls=[none|all|return|indirect-jmp]`` for straight-line
speculation hardening.
- Support for the ``_Float16`` type has been added for all targets with SSE2.
When AVX512-FP16 is not available, arithmetic on ``_Float16`` is emulated
using ``float``.
DWARF Support in Clang
----------------------

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@ -239,7 +239,6 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasAVX512ER = true;
} else if (Feature == "+avx512fp16") {
HasAVX512FP16 = true;
HasFloat16 = true;
} else if (Feature == "+avx512pf") {
HasAVX512PF = true;
} else if (Feature == "+avx512dq") {
@ -355,6 +354,9 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
.Default(NoSSE);
SSELevel = std::max(SSELevel, Level);
// Turn on _float16 for x86 (feature sse2)
HasFloat16 = SSELevel >= SSE2;
MMX3DNowEnum ThreeDNowLevel = llvm::StringSwitch<MMX3DNowEnum>(Feature)
.Case("+3dnowa", AMD3DNowAthlon)
.Case("+3dnow", AMD3DNow)

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@ -0,0 +1,29 @@
// RUN: %clang_cc1 -triple x86_64-unknown-unknown \
// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK
// CHECK-NOT: fpext
// CHECK-NOT: fptrunc
_Float16 add1(_Float16 a, _Float16 b) {
return a + b;
}
_Float16 add2(_Float16 a, _Float16 b, _Float16 c) {
return a + b + c;
}
_Float16 div(_Float16 a, _Float16 b) {
return a / b;
}
_Float16 mul(_Float16 a, _Float16 b) {
return a * b;
}
_Float16 add_and_mul1(_Float16 a, _Float16 b, _Float16 c, _Float16 d) {
return a * b + c * d;
}
_Float16 add_and_mul2(_Float16 a, _Float16 b, _Float16 c, _Float16 d) {
return (a - 6 * b) + c;
}

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@ -1,4 +1,5 @@
// RUN: %clang_cc1 %s -O0 -emit-llvm -triple x86_64-unknown-unknown -target-feature +avx512fp16 -o - | FileCheck %s --check-prefix=X86
// RUN: %clang_cc1 %s -O0 -emit-llvm -triple x86_64-unknown-unknown -o - | FileCheck %s --check-prefix=X86
_Float16 _Complex add_half_rr(_Float16 a, _Float16 b) {
// X86-LABEL: @add_half_rr(

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@ -1,5 +1,6 @@
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc -target-feature +avx512fp16 %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple i686-linux-pc %s
// RUN: %clang_cc1 -fsyntax-only -verify -triple i686-linux-pc -target-feature +sse2 %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple spir-unknown-unknown %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple armv7a-linux-gnu %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple aarch64-linux-gnu %s -DHAVE

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@ -6,7 +6,7 @@
long double ld;
double d;
_Float16 f16; // x86-error {{_Float16 is not supported on this target}}
_Float16 f16;
int main(void) {
ld = d; // x86-warning {{implicit conversion increases floating-point precision: 'double' to 'long double'}}

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@ -1,4 +1,6 @@
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s
// RUN: %clang_cc1 -fsyntax-only -verify -triple i686-linux-pc %s
// RUN: %clang_cc1 -fsyntax-only -verify -triple i686-linux-pc -target-feature +sse2 %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple spir-unknown-unknown %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple armv7a-linux-gnu %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple aarch64-linux-gnu %s -DHAVE

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@ -44,7 +44,7 @@ foreach(arch ${BUILTIN_TEST_ARCH})
string(REPLACE ";" " " BUILTINS_TEST_TARGET_CFLAGS "${BUILTINS_TEST_TARGET_CFLAGS}")
endif()
if (${arch} MATCHES "arm|aarch64|arm64" AND COMPILER_RT_HAS_FLOAT16)
if (${arch} MATCHES "arm|aarch64|arm64|i?86|x86_64|AMD64" AND COMPILER_RT_HAS_FLOAT16)
list(APPEND BUILTINS_TEST_TARGET_CFLAGS -DCOMPILER_RT_HAS_FLOAT16)
string(REPLACE ";" " " BUILTINS_TEST_TARGET_CFLAGS "${BUILTINS_TEST_TARGET_CFLAGS}")
endif()