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LLVM enablement for some older PowerPC CPUs 

llvm-svn: 174230
This commit is contained in:
Bill Schmidt 2013-02-01 22:59:51 +00:00
parent a7c84e6050
commit 52742c25ae
3 changed files with 39 additions and 0 deletions
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20
llvm/lib/Target/PowerPC/PPC.td
View File

@ -39,7 +39,12 @@ def DirectiveE500mc : SubtargetFeature<"", "DarwinDirective",
"PPC::DIR_E500mc", "">;
def DirectiveE5500 : SubtargetFeature<"", "DarwinDirective",
"PPC::DIR_E5500", "">;
def DirectivePwr3: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR3", "">;
def DirectivePwr4: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR4", "">;
def DirectivePwr5: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR5", "">;
def DirectivePwr5x: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR5X", "">;
def DirectivePwr6: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR6", "">;
def DirectivePwr6x: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR6X", "">;
def DirectivePwr7: SubtargetFeature<"", "DarwinDirective", "PPC::DIR_PWR7", "">;
def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
@ -116,10 +121,25 @@ def : Processor<"a2q", PPCA2Itineraries, [DirectiveA2, FeatureBookE,
FeatureSTFIWX, FeatureISEL,
Feature64Bit /*, Feature64BitRegs */,
FeatureQPX]>;
def : Processor<"pwr3", G5Itineraries,
[DirectivePwr3, FeatureAltivec, FeatureMFOCRF,
FeatureSTFIWX, Feature64Bit]>;
def : Processor<"pwr4", G5Itineraries,
[DirectivePwr4, FeatureAltivec, FeatureMFOCRF,
FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
def : Processor<"pwr5", G5Itineraries,
[DirectivePwr5, FeatureAltivec, FeatureMFOCRF,
FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
def : Processor<"pwr5x", G5Itineraries,
[DirectivePwr5x, FeatureAltivec, FeatureMFOCRF,
FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
def : Processor<"pwr6", G5Itineraries,
[DirectivePwr6, FeatureAltivec,
FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,
Feature64Bit /*, Feature64BitRegs */]>;
def : Processor<"pwr6x", G5Itineraries,
[DirectivePwr5x, FeatureAltivec, FeatureMFOCRF,
FeatureFSqrt, FeatureSTFIWX, Feature64Bit]>;
def : Processor<"pwr7", G5Itineraries,
[DirectivePwr7, FeatureAltivec,
FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX,

5
llvm/lib/Target/PowerPC/PPCSubtarget.h
View File

@ -43,7 +43,12 @@ namespace PPC {
DIR_A2,
DIR_E500mc,
DIR_E5500,
DIR_PWR3,
DIR_PWR4,
DIR_PWR5,
DIR_PWR5X,
DIR_PWR6,
DIR_PWR6X,
DIR_PWR7,
DIR_64
};

14
llvm/test/CodeGen/PowerPC/pwr3-6x.ll Normal file
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@ -0,0 +1,14 @@
; Test basic support for some older processors.
;RUN: llc < %s -march=ppc64 -mcpu=pwr3 | FileCheck %s
;RUN: llc < %s -march=ppc64 -mcpu=pwr4 | FileCheck %s
;RUN: llc < %s -march=ppc64 -mcpu=pwr5 | FileCheck %s
;RUN: llc < %s -march=ppc64 -mcpu=pwr5x | FileCheck %s
;RUN: llc < %s -march=ppc64 -mcpu=pwr6x | FileCheck %s
define void @foo() {
entry:
ret void
}
; CHECK: @foo