forked from OSchip/llvm-project
[X86][SSE] Add explicit braces to avoid -Wdangling-else warning.
Reviewers: RKSimon Subscribers: llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D29076 llvm-svn: 292924
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@ -30478,11 +30478,12 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG,
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// Out of range logical bit shifts are guaranteed to be zero.
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// Out of range logical bit shifts are guaranteed to be zero.
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// Out of range arithmetic bit shifts splat the sign bit.
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// Out of range arithmetic bit shifts splat the sign bit.
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APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
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APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
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if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt))
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if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt)) {
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if (LogicalShift)
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if (LogicalShift)
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return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
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return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
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else
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else
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ShiftVal = NumBitsPerElt - 1;
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ShiftVal = NumBitsPerElt - 1;
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}
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SDValue N0 = N->getOperand(0);
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SDValue N0 = N->getOperand(0);
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