From 526299c81c42c44d3174f79bbe5cc16bfbe701ce Mon Sep 17 00:00:00 2001
From: Martin Bohme <mboehme@google.com>
Date: Tue, 24 Jan 2017 12:31:30 +0000
Subject: [PATCH] [X86][SSE] Add explicit braces to avoid -Wdangling-else
 warning.

Reviewers: RKSimon

Subscribers: llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D29076

llvm-svn: 292924
---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 615ab9eb0c9b..c6ef240b9b14 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -30478,11 +30478,12 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG,
   // Out of range logical bit shifts are guaranteed to be zero.
   // Out of range arithmetic bit shifts splat the sign bit.
   APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
-  if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt))
+  if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt)) {
     if (LogicalShift)
       return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
     else
       ShiftVal = NumBitsPerElt - 1;
+  }
 
   SDValue N0 = N->getOperand(0);