forked from OSchip/llvm-project
[X86][SSE] Add explicit braces to avoid -Wdangling-else warning.
Reviewers: RKSimon Subscribers: llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D29076 llvm-svn: 292924
This commit is contained in:
parent
f9e7bf3a43
commit
526299c81c
|
@ -30478,11 +30478,12 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG,
|
|||
// Out of range logical bit shifts are guaranteed to be zero.
|
||||
// Out of range arithmetic bit shifts splat the sign bit.
|
||||
APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
|
||||
if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt))
|
||||
if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt)) {
|
||||
if (LogicalShift)
|
||||
return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
|
||||
else
|
||||
ShiftVal = NumBitsPerElt - 1;
|
||||
}
|
||||
|
||||
SDValue N0 = N->getOperand(0);
|
||||
|
||||
|
|
Loading…
Reference in New Issue