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MLIR: add SinOp Lowering to __ocml_sin_f32 and __ocml_sin_f64 

This mimics the recent similar patch for GPUToNVVM.

Differential Revision: https://reviews.llvm.org/D91252
This commit is contained in:
Adrian Kuegel 2020-11-11 14:14:43 +01:00
parent fdbc7e505c
commit 5248047c93
1 changed files with 3 additions and 1 deletions
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4
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
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@ -72,7 +72,7 @@ struct LowerGpuOpsToROCDLOpsPass
target.addIllegalDialect<gpu::GPUDialect>(); target.addIllegalDialect<gpu::GPUDialect>();
target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp, target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op, LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
LLVM::Log2Op>(); LLVM::Log2Op, LLVM::SinOp, LLVM::TanhOp>();
target.addIllegalOp<FuncOp>(); target.addIllegalOp<FuncOp>();
target.addLegalDialect<ROCDL::ROCDLDialect>(); target.addLegalDialect<ROCDL::ROCDLDialect>();
// TODO: Remove once we support replacing non-root ops. // TODO: Remove once we support replacing non-root ops.
@ -113,6 +113,8 @@ void mlir::populateGpuToROCDLConversionPatterns(
"__ocml_log10_f64"); "__ocml_log10_f64");
patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32", patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
"__ocml_log2_f64"); "__ocml_log2_f64");
patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
"__ocml_sin_f64");
patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32", patterns.insert<OpToFuncCallLowering<TanhOp>>(converter, "__ocml_tanh_f32",
"__ocml_tanh_f64"); "__ocml_tanh_f64");
} }