forked from OSchip/llvm-project
[perf2bolt] Further relax segment matching
Summary: Previously, we used p_align value of the code segment to predict the mapping of the segment at runtime. However, at times the reported value is not aligned and at other times the actual aligned value will be different because of the different page size used. All we know is that the page size used at runtime should not exceed p_align value. Adjust our segment address matching accordingly. (cherry picked from FBD28133066)
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@ -2056,27 +2056,30 @@ std::error_code DataAggregator::parseMMapEvents() {
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auto Range = GlobalMMapInfo.equal_range(NameToUse);
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for (auto I = Range.first; I != Range.second; ++I) {
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if (BC->HasFixedLoadAddress && I->second.BaseAddress) {
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const MMapInfo &MMapInfo = I->second;
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if (BC->HasFixedLoadAddress && MMapInfo.BaseAddress) {
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// Check that the binary mapping matches one of the segments.
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bool MatchFound{false};
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bool MatchFound = false;
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for (auto &KV : BC->SegmentMapInfo) {
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SegmentInfo &SegInfo = KV.second;
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const uint64_t MapAddress =
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alignDown(SegInfo.Address, SegInfo.Alignment);
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if (I->second.BaseAddress == MapAddress ||
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I->second.BaseAddress == SegInfo.Address) {
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// The mapping is page-aligned and hence the BaseAddress could be
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// different from the segment start address. We cannot know the page
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// size of the mapping, but we know it should not exceed the segment
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// alignment value. Hence we are performing an approximate check.
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if (SegInfo.Address >= MMapInfo.BaseAddress &&
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SegInfo.Address - MMapInfo.BaseAddress < SegInfo.Alignment) {
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MatchFound = true;
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break;
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}
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}
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if (!MatchFound) {
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errs() << "PERF2BOLT-WARNING: ignoring mapping of " << NameToUse
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<< " at 0x" << Twine::utohexstr(I->second.BaseAddress) << '\n';
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<< " at 0x" << Twine::utohexstr(MMapInfo.BaseAddress) << '\n';
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continue;
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}
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}
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BinaryMMapInfo.insert(std::make_pair(I->second.PID, I->second));
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BinaryMMapInfo.insert(std::make_pair(MMapInfo.PID, MMapInfo));
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}
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if (BinaryMMapInfo.empty()) {
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