maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[AArch64][SVE2] Asm: add SADALP and UADALP instructions 

Summary:
This patch adds support for the integer pairwise add and accumulate long
instructions SADALP/UADALP. These instructions are predicated.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62001

llvm-svn: 361154
This commit is contained in:
Cullen Rhodes 2019-05-20 13:50:15 +00:00
parent 7fbbdfd914
commit 523789fa6b
6 changed files with 221 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
View File

@ -1123,6 +1123,10 @@ let Predicates = [HasSVE2] in {
defm SHSUBR_ZPmZ : sve2_int_arith_pred<0b101100, "shsubr">;
defm UHSUBR_ZPmZ : sve2_int_arith_pred<0b101110, "uhsubr">;
// SVE2 integer pairwise add and accumulate long
defm SADALP_ZPmZ : sve2_int_sadd_long_accum_pairwise<0, "sadalp">;
defm UADALP_ZPmZ : sve2_int_sadd_long_accum_pairwise<1, "uadalp">;
// SVE2 integer multiply long
defm SQDMULLB_ZZZ : sve2_wide_int_arith_long<0b11000, "sqdmullb">;
defm SQDMULLT_ZZZ : sve2_wide_int_arith_long<0b11001, "sqdmullt">;

27
llvm/lib/Target/AArch64/SVEInstrFormats.td
View File

@ -2090,6 +2090,33 @@ multiclass sve2_int_arith_pred<bits<6> opc, string asm> {
def _D : sve2_int_arith_pred<0b11, opc, asm, ZPR64>;
}
class sve2_int_sadd_long_accum_pairwise<bits<2> sz, bit U, string asm,
ZPRRegOp zprty1, ZPRRegOp zprty2>
: I<(outs zprty1:$Zda), (ins PPR3bAny:$Pg, zprty1:$_Zda, zprty2:$Zn),
asm, "\t$Zda, $Pg/m, $Zn", "", []>, Sched<[]> {
bits<3> Pg;
bits<5> Zn;
bits<5> Zda;
let Inst{31-24} = 0b01000100;
let Inst{23-22} = sz;
let Inst{21-17} = 0b00010;
let Inst{16} = U;
let Inst{15-13} = 0b101;
let Inst{12-10} = Pg;
let Inst{9-5} = Zn;
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
let DestructiveInstType = Destructive;
let ElementSize = zprty1.ElementSize;
}
multiclass sve2_int_sadd_long_accum_pairwise<bit U, string asm> {
def _H : sve2_int_sadd_long_accum_pairwise<0b01, U, asm, ZPR16, ZPR8>;
def _S : sve2_int_sadd_long_accum_pairwise<0b10, U, asm, ZPR32, ZPR16>;
def _D : sve2_int_sadd_long_accum_pairwise<0b11, U, asm, ZPR64, ZPR32>;
}
//===----------------------------------------------------------------------===//
// SVE2 Widening Integer Arithmetic Group
//===----------------------------------------------------------------------===//

42
llvm/test/MC/AArch64/SVE2/sadalp-diagnostics.s Normal file
View File

@ -0,0 +1,42 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
// --------------------------------------------------------------------------//
// Element sizes must match
sadalp z0.b, p0/m, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sadalp z0.b, p0/m, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sadalp z0.h, p0/m, z1.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sadalp z0.h, p0/m, z1.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sadalp z0.s, p0/m, z1.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sadalp z0.s, p0/m, z1.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sadalp z0.d, p0/m, z1.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sadalp z0.d, p0/m, z1.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Predicate not in restricted predicate range
sadalp z0.h, p8/m, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: sadalp z0.h, p8/m, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Negative movprfx tests
movprfx z31.s, p0/z, z6.s // element type of the source operand, rather than destination.
sadalp z31.d, p0/m, z30.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
// CHECK-NEXT: sadalp z31.d, p0/m, z30.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

53
llvm/test/MC/AArch64/SVE2/sadalp.s Normal file
View File

@ -0,0 +1,53 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
sadalp z0.h, p0/m, z1.b
// CHECK-INST: sadalp z0.h, p0/m, z1.b
// CHECK-ENCODING: [0x20,0xa0,0x44,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 20 a0 44 44 <unknown>
sadalp z29.s, p0/m, z30.h
// CHECK-INST: sadalp z29.s, p0/m, z30.h
// CHECK-ENCODING: [0xdd,0xa3,0x84,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: dd a3 84 44 <unknown>
sadalp z30.d, p7/m, z31.s
// CHECK-INST: sadalp z30.d, p7/m, z31.s
// CHECK-ENCODING: [0xfe,0xbf,0xc4,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: fe bf c4 44 <unknown>
// --------------------------------------------------------------------------//
// Test compatibility with MOVPRFX instruction.
movprfx z31.d, p0/z, z6.d
// CHECK-INST: movprfx z31.d, p0/z, z6.d
// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: df 20 d0 04 <unknown>
sadalp z31.d, p0/m, z30.s
// CHECK-INST: sadalp z31.d, p0/m, z30.s
// CHECK-ENCODING: [0xdf,0xa3,0xc4,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: df a3 c4 44 <unknown>
movprfx z31, z6
// CHECK-INST: movprfx z31, z6
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: df bc 20 04 <unknown>
sadalp z31.d, p0/m, z30.s
// CHECK-INST: sadalp z31.d, p0/m, z30.s
// CHECK-ENCODING: [0xdf,0xa3,0xc4,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: df a3 c4 44 <unknown>

42
llvm/test/MC/AArch64/SVE2/uadalp-diagnostics.s Normal file
View File

@ -0,0 +1,42 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
// --------------------------------------------------------------------------//
// Element sizes must match
uadalp z0.b, p0/m, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uadalp z0.b, p0/m, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uadalp z0.h, p0/m, z1.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uadalp z0.h, p0/m, z1.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uadalp z0.s, p0/m, z1.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uadalp z0.s, p0/m, z1.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uadalp z0.d, p0/m, z1.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uadalp z0.d, p0/m, z1.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Predicate not in restricted predicate range
uadalp z0.h, p8/m, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: uadalp z0.h, p8/m, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Negative movprfx tests
movprfx z31.s, p0/z, z6.s // element type of the source operand, rather than destination.
uadalp z31.d, p0/m, z30.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
// CHECK-NEXT: uadalp z31.d, p0/m, z30.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

53
llvm/test/MC/AArch64/SVE2/uadalp.s Normal file
View File

@ -0,0 +1,53 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
uadalp z0.h, p0/m, z1.b
// CHECK-INST: uadalp z0.h, p0/m, z1.b
// CHECK-ENCODING: [0x20,0xa0,0x45,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 20 a0 45 44 <unknown>
uadalp z29.s, p0/m, z30.h
// CHECK-INST: uadalp z29.s, p0/m, z30.h
// CHECK-ENCODING: [0xdd,0xa3,0x85,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: dd a3 85 44 <unknown>
uadalp z30.d, p7/m, z31.s
// CHECK-INST: uadalp z30.d, p7/m, z31.s
// CHECK-ENCODING: [0xfe,0xbf,0xc5,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: fe bf c5 44 <unknown>
// --------------------------------------------------------------------------//
// Test compatibility with MOVPRFX instruction.
movprfx z31.d, p0/z, z6.d
// CHECK-INST: movprfx z31.d, p0/z, z6.d
// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: df 20 d0 04 <unknown>
uadalp z31.d, p0/m, z30.s
// CHECK-INST: uadalp z31.d, p0/m, z30.s
// CHECK-ENCODING: [0xdf,0xa3,0xc5,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: df a3 c5 44 <unknown>
movprfx z31, z6
// CHECK-INST: movprfx z31, z6
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: df bc 20 04 <unknown>
uadalp z31.d, p0/m, z30.s
// CHECK-INST: uadalp z31.d, p0/m, z30.s
// CHECK-ENCODING: [0xdf,0xa3,0xc5,0x44]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: df a3 c5 44 <unknown>