ADd support for "lowering" the X86::MOVZX16rr8/X86::MOVZX16rm8

subreg32 modifiers.

llvm-svn: 81196
This commit is contained in:
Chris Lattner 2009-09-08 06:03:07 +00:00
parent 8280e58545
commit 520a7f9250
1 changed files with 8 additions and 1 deletions

View File

@ -309,11 +309,18 @@ printInstructionThroughMCStreamer(const MachineInstr *MI) {
// Handle the 'subreg rewriting' for the lea64_32mem operand.
lower_lea64_32mem(&TmpInst, 1);
break;
case X86::MOV16r0:
TmpInst.setOpcode(X86::MOV32r0);
lower_subreg32(&TmpInst, 0);
break;
case X86::MOVZX16rr8:
TmpInst.setOpcode(X86::MOVZX32rr8);
lower_subreg32(&TmpInst, 0);
break;
case X86::MOVZX16rm8:
TmpInst.setOpcode(X86::MOVZX32rm8);
lower_subreg32(&TmpInst, 0);
break;
}
printInstruction(&TmpInst);