forked from OSchip/llvm-project
Simplify switch statement in ARM subtarget align access
This switch can be reduced to a simpler if/else statement. Patch by Charlie Turner. llvm-svn: 219299
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@ -292,37 +292,31 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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SupportsTailCall = !isThumb1Only();
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}
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switch (Align) {
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case DefaultAlign:
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// Assume pre-ARMv6 doesn't support unaligned accesses.
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//
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// ARMv6 may or may not support unaligned accesses depending on the
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// SCTLR.U bit, which is architecture-specific. We assume ARMv6
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// Darwin and NetBSD targets support unaligned accesses, and others don't.
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//
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// ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
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// which raises an alignment fault on unaligned accesses. Linux
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// defaults this bit to 0 and handles it as a system-wide (not
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// per-process) setting. It is therefore safe to assume that ARMv7+
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// Linux targets support unaligned accesses. The same goes for NaCl.
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//
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// The above behavior is consistent with GCC.
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AllowsUnalignedMem =
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(hasV7Ops() && (isTargetLinux() || isTargetNaCl() ||
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isTargetNetBSD())) ||
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(hasV6Ops() && (isTargetMachO() || isTargetNetBSD()));
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// The one exception is cortex-m0, which despite being v6, does not
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// support unaligned accesses. Rather than make the above boolean
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// expression even more obtuse, just override the value here.
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if (isThumb1Only() && isMClass())
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AllowsUnalignedMem = false;
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break;
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case StrictAlign:
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if (Align == DefaultAlign) {
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// Assume pre-ARMv6 doesn't support unaligned accesses.
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//
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// ARMv6 may or may not support unaligned accesses depending on the
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// SCTLR.U bit, which is architecture-specific. We assume ARMv6
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// Darwin and NetBSD targets support unaligned accesses, and others don't.
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//
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// ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
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// which raises an alignment fault on unaligned accesses. Linux
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// defaults this bit to 0 and handles it as a system-wide (not
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// per-process) setting. It is therefore safe to assume that ARMv7+
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// Linux targets support unaligned accesses. The same goes for NaCl.
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//
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// The above behavior is consistent with GCC.
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AllowsUnalignedMem =
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(hasV7Ops() && (isTargetLinux() || isTargetNaCl() ||
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isTargetNetBSD())) ||
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(hasV6Ops() && (isTargetMachO() || isTargetNetBSD()));
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// The one exception is cortex-m0, which despite being v6, does not
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// support unaligned accesses. Rather than make the above boolean
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// expression even more obtuse, just override the value here.
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if (isThumb1Only() && isMClass())
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AllowsUnalignedMem = false;
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break;
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case NoStrictAlign:
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AllowsUnalignedMem = true;
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break;
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} else {
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AllowsUnalignedMem = !(Align == StrictAlign);
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}
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switch (IT) {
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