forked from OSchip/llvm-project
Add instruction encodings for PEEK and ENDIN.
Previously these were marked with the wrong format. llvm-svn: 170334
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@ -891,6 +891,14 @@ def INITDP_2r : _F2R<0b000010, (outs), (ins GRRegs:$src, GRRegs:$t),
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"init t[$t]:dp, $src",
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[(int_xcore_initdp GRRegs:$t, GRRegs:$src)]>;
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def PEEK_2r : _F2R<0b101110, (outs GRRegs:$dst), (ins GRRegs:$src),
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"peek $dst, res[$src]",
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[(set GRRegs:$dst, (int_xcore_peek GRRegs:$src))]>;
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def ENDIN_2r : _F2R<0b100101, (outs GRRegs:$dst), (ins GRRegs:$src),
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"endin $dst, res[$src]",
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[(set GRRegs:$dst, (int_xcore_endin GRRegs:$src))]>;
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// Two operand long
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// getd, testlcl
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def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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@ -933,14 +941,6 @@ def SETRDY_l2r : _FL2R<(outs), (ins GRRegs:$src1, GRRegs:$src2),
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"setrdy res[$src1], $src2",
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[(int_xcore_setrdy GRRegs:$src1, GRRegs:$src2)]>;
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def PEEK_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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"peek $dst, res[$src]",
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[(set GRRegs:$dst, (int_xcore_peek GRRegs:$src))]>;
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def ENDIN_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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"endin $dst, res[$src]",
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[(set GRRegs:$dst, (int_xcore_endin GRRegs:$src))]>;
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// One operand short
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// TODO edu, eeu, waitet, waitef, tstart, clrtp
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// setdp, setcp, setev, kcall
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@ -158,3 +158,9 @@
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# CHECK: zext r2, 32
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0xd8 0x46
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# CHECK: peek r0, res[r5]
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0x81 0xbf
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# CHECK: endin r10, res[r1]
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0x59 0x97
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