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[SLSR] use 'match' to simplify code; NFC 

This pass could probably be modified slightly to allow
vector splat transforms for practically no cost, but
it only works on scalars for now. So the use of the
newer 'match' API should make no functional difference. 

llvm-svn: 345030
This commit is contained in:
Sanjay Patel 2018-10-23 14:07:39 +00:00
parent 6d57266a8c
commit 5141435d23
2 changed files with 34 additions and 4 deletions
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9
llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
View File

@ -640,12 +640,12 @@ void StraightLineStrengthReduce::rewriteCandidateWithBasis(
Value *Reduced = nullptr; // equivalent to but weaker than C.Ins
switch (C.CandidateKind) {
case Candidate::Add:
case Candidate::Mul:
case Candidate::Mul: {
// C = Basis + Bump
if (BinaryOperator::isNeg(Bump)) {
Value *NegBump;
if (match(Bump, m_Neg(m_Value(NegBump)))) {
// If Bump is a neg instruction, emit C = Basis - (-Bump).
Reduced =
Builder.CreateSub(Basis.Ins, BinaryOperator::getNegArgument(Bump));
Reduced = Builder.CreateSub(Basis.Ins, NegBump);
// We only use the negative argument of Bump, and Bump itself may be
// trivially dead.
RecursivelyDeleteTriviallyDeadInstructions(Bump);
@ -662,6 +662,7 @@ void StraightLineStrengthReduce::rewriteCandidateWithBasis(
Reduced = Builder.CreateAdd(Basis.Ins, Bump);
}
break;
}
case Candidate::GEP:
{
Type *IntPtrTy = DL->getIntPtrType(C.Ins->getType());

29
llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
View File

@ -99,6 +99,34 @@ define void @stride_is_minus_2s(i32 %b, i32 %s) {
ret void
}
; TODO: This pass is targeted at simple address-calcs, so it is artificially limited to
; match scalar values. The code could be modified to handle vector types too.
define void @stride_is_minus_2s_vec(<2 x i32> %b, <2 x i32> %s) {
; CHECK-LABEL: @stride_is_minus_2s_vec(
; CHECK-NEXT: [[S6:%.*]] = mul <2 x i32> [[S:%.*]], <i32 6, i32 6>
; CHECK-NEXT: [[T1:%.*]] = add <2 x i32> [[B:%.*]], [[S6]]
; CHECK-NEXT: call void @voo(<2 x i32> [[T1]])
; CHECK-NEXT: [[S4:%.*]] = shl <2 x i32> [[S]], <i32 2, i32 2>
; CHECK-NEXT: [[T2:%.*]] = add <2 x i32> [[B]], [[S4]]
; CHECK-NEXT: call void @voo(<2 x i32> [[T2]])
; CHECK-NEXT: [[S2:%.*]] = shl <2 x i32> [[S]], <i32 1, i32 1>
; CHECK-NEXT: [[T3:%.*]] = add <2 x i32> [[B]], [[S2]]
; CHECK-NEXT: call void @voo(<2 x i32> [[T3]])
; CHECK-NEXT: ret void
;
%s6 = mul <2 x i32> %s, <i32 6, i32 6>
%t1 = add <2 x i32> %b, %s6
call void @voo(<2 x i32> %t1)
%s4 = shl <2 x i32> %s, <i32 2, i32 2>
%t2 = add <2 x i32> %b, %s4
call void @voo(<2 x i32> %t2)
%s2 = shl <2 x i32> %s, <i32 1, i32 1>
%t3 = add <2 x i32> %b, %s2
call void @voo(<2 x i32> %t3)
ret void
}
; t = b + (s << 3);
; foo(t);
; foo(b + s);
@ -140,4 +168,5 @@ define void @slsr_strided_add_128bit(i128 %b, i128 %s) {
}
declare void @foo(i32)
declare void @voo(<2 x i32>)
declare void @bar(i128)