forked from OSchip/llvm-project
[InstCombine] add vector tests for icmp (sub nsw)
llvm-svn: 281630
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@ -2313,6 +2313,17 @@ define i1 @f1(i64 %a, i64 %b) {
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ret i1 %v
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}
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define <2 x i1> @f1_vec(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: @f1_vec(
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; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
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; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[T]], <i64 -1, i64 -1>
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; CHECK-NEXT: ret <2 x i1> [[V]]
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;
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%t = sub nsw <2 x i64> %a, %b
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%v = icmp sgt <2 x i64> %t, <i64 -1, i64 -1>
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ret <2 x i1> %v
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}
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define i1 @f2(i64 %a, i64 %b) {
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; CHECK-LABEL: @f2(
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; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 %a, %b
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@ -2323,6 +2334,17 @@ define i1 @f2(i64 %a, i64 %b) {
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ret i1 %v
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}
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define <2 x i1> @f2_vec(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: @f2_vec(
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; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
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; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[T]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[V]]
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;
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%t = sub nsw <2 x i64> %a, %b
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%v = icmp sgt <2 x i64> %t, zeroinitializer
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ret <2 x i1> %v
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}
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define i1 @f3(i64 %a, i64 %b) {
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; CHECK-LABEL: @f3(
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; CHECK-NEXT: [[V:%.*]] = icmp slt i64 %a, %b
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@ -2333,6 +2355,17 @@ define i1 @f3(i64 %a, i64 %b) {
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ret i1 %v
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}
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define <2 x i1> @f3_vec(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: @f3_vec(
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; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
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; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[T]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[V]]
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;
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%t = sub nsw <2 x i64> %a, %b
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%v = icmp slt <2 x i64> %t, zeroinitializer
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ret <2 x i1> %v
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}
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define i1 @f4(i64 %a, i64 %b) {
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; CHECK-LABEL: @f4(
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; CHECK-NEXT: [[V:%.*]] = icmp sle i64 %a, %b
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@ -2343,6 +2376,17 @@ define i1 @f4(i64 %a, i64 %b) {
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ret i1 %v
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}
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define <2 x i1> @f4_vec(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: @f4_vec(
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; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
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; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[T]], <i64 1, i64 1>
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; CHECK-NEXT: ret <2 x i1> [[V]]
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;
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%t = sub nsw <2 x i64> %a, %b
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%v = icmp slt <2 x i64> %t, <i64 1, i64 1>
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ret <2 x i1> %v
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}
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define i32 @f5(i8 %a, i8 %b) {
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; CHECK-LABEL: @f5(
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 %a to i32
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