[InstCombine] add vector tests for icmp (sub nsw)

llvm-svn: 281630
This commit is contained in:
Sanjay Patel 2016-09-15 17:54:47 +00:00
parent f7518498ff
commit 514068397e
1 changed files with 44 additions and 0 deletions

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@ -2313,6 +2313,17 @@ define i1 @f1(i64 %a, i64 %b) {
ret i1 %v
}
define <2 x i1> @f1_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f1_vec(
; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[T]], <i64 -1, i64 -1>
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
%v = icmp sgt <2 x i64> %t, <i64 -1, i64 -1>
ret <2 x i1> %v
}
define i1 @f2(i64 %a, i64 %b) {
; CHECK-LABEL: @f2(
; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 %a, %b
@ -2323,6 +2334,17 @@ define i1 @f2(i64 %a, i64 %b) {
ret i1 %v
}
define <2 x i1> @f2_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f2_vec(
; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[T]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
%v = icmp sgt <2 x i64> %t, zeroinitializer
ret <2 x i1> %v
}
define i1 @f3(i64 %a, i64 %b) {
; CHECK-LABEL: @f3(
; CHECK-NEXT: [[V:%.*]] = icmp slt i64 %a, %b
@ -2333,6 +2355,17 @@ define i1 @f3(i64 %a, i64 %b) {
ret i1 %v
}
define <2 x i1> @f3_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f3_vec(
; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[T]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
%v = icmp slt <2 x i64> %t, zeroinitializer
ret <2 x i1> %v
}
define i1 @f4(i64 %a, i64 %b) {
; CHECK-LABEL: @f4(
; CHECK-NEXT: [[V:%.*]] = icmp sle i64 %a, %b
@ -2343,6 +2376,17 @@ define i1 @f4(i64 %a, i64 %b) {
ret i1 %v
}
define <2 x i1> @f4_vec(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @f4_vec(
; CHECK-NEXT: [[T:%.*]] = sub nsw <2 x i64> %a, %b
; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[T]], <i64 1, i64 1>
; CHECK-NEXT: ret <2 x i1> [[V]]
;
%t = sub nsw <2 x i64> %a, %b
%v = icmp slt <2 x i64> %t, <i64 1, i64 1>
ret <2 x i1> %v
}
define i32 @f5(i8 %a, i8 %b) {
; CHECK-LABEL: @f5(
; CHECK-NEXT: [[CONV:%.*]] = zext i8 %a to i32